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authorNicholas Piggin <npiggin@gmail.com>2019-06-28 15:33:24 +1000
committerMichael Ellerman <mpe@ellerman.id.au>2019-07-02 21:39:48 +1000
commitad73d8d4f4a7994b234020fc6484c87672b0c404 (patch)
tree911446fb622c1abd546dbe80eefc2bcc9b1c79bf /arch/powerpc/kernel
parent9592b29a9cf14db596c752349e7d5b7a29d3bf90 (diff)
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powerpc/64s/exception: move machine check windup in_mce handling
Move in_mce decrement earlier before registers are restored (but still after RI=0). This helps with later consolidation. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/kernel')
-rw-r--r--arch/powerpc/kernel/exceptions-64s.S8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index 823e930b6e3e..d8f1d70c675f 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -1080,6 +1080,10 @@ EXC_COMMON_BEGIN(machine_check_common)
/* Clear MSR_RI before setting SRR0 and SRR1. */\
li r9,0; \
mtmsrd r9,1; /* Clear MSR_RI */ \
+ /* Decrement paca->in_mce now RI is clear. */ \
+ lhz r12,PACA_IN_MCE(r13); \
+ subi r12,r12,1; \
+ sth r12,PACA_IN_MCE(r13); \
/* Move original SRR0 and SRR1 into the respective regs */ \
ld r9,_MSR(r1); \
mtspr SPRN_SRR1,r9; \
@@ -1096,10 +1100,6 @@ EXC_COMMON_BEGIN(machine_check_common)
REST_GPR(10, r1); \
ld r11,_CCR(r1); \
mtcr r11; \
- /* Decrement paca->in_mce. */ \
- lhz r12,PACA_IN_MCE(r13); \
- subi r12,r12,1; \
- sth r12,PACA_IN_MCE(r13); \
REST_GPR(11, r1); \
REST_2GPRS(12, r1); \
/* restore original r1. */ \