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authorNicholas Piggin <npiggin@gmail.com>2018-06-01 20:01:19 +1000
committerMichael Ellerman <mpe@ellerman.id.au>2018-06-03 20:40:36 +1000
commitf1cb8f9beba8699dd1b4518418191499e53f7b17 (patch)
tree0d66bcf4ae3fe02d0556cd4e9079550a3d3a7d75 /arch/powerpc/mm
parent68662f85f3c3ea8a6fb61586a05955ab51bbb9e6 (diff)
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powerpc/64s/radix: avoid ptesync after set_pte and ptep_set_access_flags
The ISA suggests ptesync after setting a pte, to prevent a table walk initiated by a subsequent access from missing that store and causing a spurious fault. This is an architectual allowance that allows an implementation's page table walker to be incoherent with the store queue. However there is no correctness problem in taking a spurious fault in userspace -- the kernel copes with these at any time, so the updated pte will be found eventually. Spurious kernel faults on vmap memory must be avoided, so a ptesync is put into flush_cache_vmap. On POWER9 so far I have not found a measurable window where this can result in more minor faults, so as an optimisation, remove the costly ptesync from pte updates. If an implementation benefits from ptesync, it would be better to add it back in update_mmu_cache, so it's not done for things like fork(2). fork --fork --exec benchmark improved 5.2% (12400->13100). Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/mm')
-rw-r--r--arch/powerpc/mm/pgtable-radix.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/mm/pgtable-radix.c b/arch/powerpc/mm/pgtable-radix.c
index d6f74cbf0fed..96f68c5aa1f5 100644
--- a/arch/powerpc/mm/pgtable-radix.c
+++ b/arch/powerpc/mm/pgtable-radix.c
@@ -1115,5 +1115,5 @@ void radix__ptep_set_access_flags(struct vm_area_struct *vma, pte_t *ptep,
* an access fault, which is defined by the architectue.
*/
}
- asm volatile("ptesync" : : : "memory");
+ /* See ptesync comment in radix__set_pte_at */
}