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author | Paul Mundt <lethal@linux-sh.org> | 2010-01-26 12:58:40 +0900 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2010-01-26 12:58:40 +0900 |
commit | 9d56dd3b083a3bec56e9da35ce07baca81030b03 (patch) | |
tree | a9df9d514fbc32defc1ca8a6d7c2795f15b8a128 /arch/sh/boards/mach-se | |
parent | a077e91690fb32a1453423b2cf1df3492fd30c3a (diff) | |
download | linux-stable-9d56dd3b083a3bec56e9da35ce07baca81030b03.tar.gz linux-stable-9d56dd3b083a3bec56e9da35ce07baca81030b03.tar.bz2 linux-stable-9d56dd3b083a3bec56e9da35ce07baca81030b03.zip |
sh: Mass ctrl_in/outX to __raw_read/writeX conversion.
The old ctrl in/out routines are non-portable and unsuitable for
cross-platform use. While drivers/sh has already been sanitized, there
is still quite a lot of code that is not. This converts the arch/sh/ bits
over, which permits us to flag the routines as deprecated whilst still
building with -Werror for the architecture code, and to ensure that
future users are not added.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/boards/mach-se')
-rw-r--r-- | arch/sh/boards/mach-se/7206/io.c | 2 | ||||
-rw-r--r-- | arch/sh/boards/mach-se/7206/irq.c | 40 | ||||
-rw-r--r-- | arch/sh/boards/mach-se/7343/irq.c | 10 | ||||
-rw-r--r-- | arch/sh/boards/mach-se/7343/setup.c | 6 | ||||
-rw-r--r-- | arch/sh/boards/mach-se/770x/irq.c | 14 | ||||
-rw-r--r-- | arch/sh/boards/mach-se/7721/irq.c | 2 | ||||
-rw-r--r-- | arch/sh/boards/mach-se/7721/setup.c | 8 | ||||
-rw-r--r-- | arch/sh/boards/mach-se/7722/irq.c | 10 | ||||
-rw-r--r-- | arch/sh/boards/mach-se/7722/setup.c | 34 | ||||
-rw-r--r-- | arch/sh/boards/mach-se/7724/irq.c | 20 | ||||
-rw-r--r-- | arch/sh/boards/mach-se/7724/setup.c | 26 | ||||
-rw-r--r-- | arch/sh/boards/mach-se/7780/irq.c | 18 | ||||
-rw-r--r-- | arch/sh/boards/mach-se/7780/setup.c | 26 |
13 files changed, 108 insertions, 108 deletions
diff --git a/arch/sh/boards/mach-se/7206/io.c b/arch/sh/boards/mach-se/7206/io.c index 180455642a43..adadc77532ee 100644 --- a/arch/sh/boards/mach-se/7206/io.c +++ b/arch/sh/boards/mach-se/7206/io.c @@ -16,7 +16,7 @@ static inline void delay(void) { - ctrl_inw(0x20000000); /* P2 ROM Area */ + __raw_readw(0x20000000); /* P2 ROM Area */ } /* MS7750 requires special versions of in*, out* routines, since diff --git a/arch/sh/boards/mach-se/7206/irq.c b/arch/sh/boards/mach-se/7206/irq.c index aef7f052851a..79be4bc59933 100644 --- a/arch/sh/boards/mach-se/7206/irq.c +++ b/arch/sh/boards/mach-se/7206/irq.c @@ -32,12 +32,12 @@ static void disable_se7206_irq(unsigned int irq) unsigned short msk0,msk1; /* Set the priority in IPR to 0 */ - val = ctrl_inw(INTC_IPR01); + val = __raw_readw(INTC_IPR01); val &= mask; - ctrl_outw(val, INTC_IPR01); + __raw_writew(val, INTC_IPR01); /* FPGA mask set */ - msk0 = ctrl_inw(INTMSK0); - msk1 = ctrl_inw(INTMSK1); + msk0 = __raw_readw(INTMSK0); + msk1 = __raw_readw(INTMSK1); switch (irq) { case IRQ0_IRQ: @@ -51,8 +51,8 @@ static void disable_se7206_irq(unsigned int irq) msk1 |= 0x00ff; break; } - ctrl_outw(msk0, INTMSK0); - ctrl_outw(msk1, INTMSK1); + __raw_writew(msk0, INTMSK0); + __raw_writew(msk1, INTMSK1); } static void enable_se7206_irq(unsigned int irq) @@ -62,13 +62,13 @@ static void enable_se7206_irq(unsigned int irq) unsigned short msk0,msk1; /* Set priority in IPR back to original value */ - val = ctrl_inw(INTC_IPR01); + val = __raw_readw(INTC_IPR01); val |= value; - ctrl_outw(val, INTC_IPR01); + __raw_writew(val, INTC_IPR01); /* FPGA mask reset */ - msk0 = ctrl_inw(INTMSK0); - msk1 = ctrl_inw(INTMSK1); + msk0 = __raw_readw(INTMSK0); + msk1 = __raw_readw(INTMSK1); switch (irq) { case IRQ0_IRQ: @@ -82,8 +82,8 @@ static void enable_se7206_irq(unsigned int irq) msk1 &= ~0x00ff; break; } - ctrl_outw(msk0, INTMSK0); - ctrl_outw(msk1, INTMSK1); + __raw_writew(msk0, INTMSK0); + __raw_writew(msk1, INTMSK1); } static void eoi_se7206_irq(unsigned int irq) @@ -93,8 +93,8 @@ static void eoi_se7206_irq(unsigned int irq) if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) enable_se7206_irq(irq); /* FPGA isr clear */ - sts0 = ctrl_inw(INTSTS0); - sts1 = ctrl_inw(INTSTS1); + sts0 = __raw_readw(INTSTS0); + sts1 = __raw_readw(INTSTS1); switch (irq) { case IRQ0_IRQ: @@ -108,8 +108,8 @@ static void eoi_se7206_irq(unsigned int irq) sts1 &= ~0x00ff; break; } - ctrl_outw(sts0, INTSTS0); - ctrl_outw(sts1, INTSTS1); + __raw_writew(sts0, INTSTS0); + __raw_writew(sts1, INTSTS1); } static struct irq_chip se7206_irq_chip __read_mostly = { @@ -136,11 +136,11 @@ void __init init_se7206_IRQ(void) make_se7206_irq(IRQ0_IRQ); /* SMC91C111 */ make_se7206_irq(IRQ1_IRQ); /* ATA */ make_se7206_irq(IRQ3_IRQ); /* SLOT / PCM */ - ctrl_outw(inw(INTC_ICR1) | 0x000b ,INTC_ICR1 ) ; /* ICR1 */ + __raw_writew(inw(INTC_ICR1) | 0x000b ,INTC_ICR1 ) ; /* ICR1 */ /* FPGA System register setup*/ - ctrl_outw(0x0000,INTSTS0); /* Clear INTSTS0 */ - ctrl_outw(0x0000,INTSTS1); /* Clear INTSTS1 */ + __raw_writew(0x0000,INTSTS0); /* Clear INTSTS0 */ + __raw_writew(0x0000,INTSTS1); /* Clear INTSTS1 */ /* IRQ0=LAN, IRQ1=ATA, IRQ3=SLT,PCM */ - ctrl_outw(0x0001,INTSEL); + __raw_writew(0x0001,INTSEL); } diff --git a/arch/sh/boards/mach-se/7343/irq.c b/arch/sh/boards/mach-se/7343/irq.c index c60fd13608d0..d4305c26e9f7 100644 --- a/arch/sh/boards/mach-se/7343/irq.c +++ b/arch/sh/boards/mach-se/7343/irq.c @@ -21,13 +21,13 @@ unsigned int se7343_fpga_irq[SE7343_FPGA_IRQ_NR] = { 0, }; static void disable_se7343_irq(unsigned int irq) { unsigned int bit = (unsigned int)get_irq_chip_data(irq); - ctrl_outw(ctrl_inw(PA_CPLD_IMSK) | 1 << bit, PA_CPLD_IMSK); + __raw_writew(__raw_readw(PA_CPLD_IMSK) | 1 << bit, PA_CPLD_IMSK); } static void enable_se7343_irq(unsigned int irq) { unsigned int bit = (unsigned int)get_irq_chip_data(irq); - ctrl_outw(ctrl_inw(PA_CPLD_IMSK) & ~(1 << bit), PA_CPLD_IMSK); + __raw_writew(__raw_readw(PA_CPLD_IMSK) & ~(1 << bit), PA_CPLD_IMSK); } static struct irq_chip se7343_irq_chip __read_mostly = { @@ -39,7 +39,7 @@ static struct irq_chip se7343_irq_chip __read_mostly = { static void se7343_irq_demux(unsigned int irq, struct irq_desc *desc) { - unsigned short intv = ctrl_inw(PA_CPLD_ST); + unsigned short intv = __raw_readw(PA_CPLD_ST); unsigned int ext_irq = 0; intv &= (1 << SE7343_FPGA_IRQ_NR) - 1; @@ -59,8 +59,8 @@ void __init init_7343se_IRQ(void) { int i, irq; - ctrl_outw(0, PA_CPLD_IMSK); /* disable all irqs */ - ctrl_outw(0x2000, 0xb03fffec); /* mrshpc irq enable */ + __raw_writew(0, PA_CPLD_IMSK); /* disable all irqs */ + __raw_writew(0x2000, 0xb03fffec); /* mrshpc irq enable */ for (i = 0; i < SE7343_FPGA_IRQ_NR; i++) { irq = create_irq(); diff --git a/arch/sh/boards/mach-se/7343/setup.c b/arch/sh/boards/mach-se/7343/setup.c index 3412bb2973ae..d2370af56d77 100644 --- a/arch/sh/boards/mach-se/7343/setup.c +++ b/arch/sh/boards/mach-se/7343/setup.c @@ -161,10 +161,10 @@ device_initcall(sh7343se_devices_setup); */ static void __init sh7343se_setup(char **cmdline_p) { - ctrl_outw(0xf900, FPGA_OUT); /* FPGA */ + __raw_writew(0xf900, FPGA_OUT); /* FPGA */ - ctrl_outw(0x0002, PORT_PECR); /* PORT E 1 = IRQ5 */ - ctrl_outw(0x0020, PORT_PSELD); + __raw_writew(0x0002, PORT_PECR); /* PORT E 1 = IRQ5 */ + __raw_writew(0x0020, PORT_PSELD); printk(KERN_INFO "MS7343CP01 Setup...done\n"); } diff --git a/arch/sh/boards/mach-se/770x/irq.c b/arch/sh/boards/mach-se/770x/irq.c index ec1fea571b52..1028c17b81bc 100644 --- a/arch/sh/boards/mach-se/770x/irq.c +++ b/arch/sh/boards/mach-se/770x/irq.c @@ -96,13 +96,13 @@ static struct ipr_desc ipr_irq_desc = { void __init init_se_IRQ(void) { /* Disable all interrupts */ - ctrl_outw(0, BCR_ILCRA); - ctrl_outw(0, BCR_ILCRB); - ctrl_outw(0, BCR_ILCRC); - ctrl_outw(0, BCR_ILCRD); - ctrl_outw(0, BCR_ILCRE); - ctrl_outw(0, BCR_ILCRF); - ctrl_outw(0, BCR_ILCRG); + __raw_writew(0, BCR_ILCRA); + __raw_writew(0, BCR_ILCRB); + __raw_writew(0, BCR_ILCRC); + __raw_writew(0, BCR_ILCRD); + __raw_writew(0, BCR_ILCRE); + __raw_writew(0, BCR_ILCRF); + __raw_writew(0, BCR_ILCRG); register_ipr_controller(&ipr_irq_desc); } diff --git a/arch/sh/boards/mach-se/7721/irq.c b/arch/sh/boards/mach-se/7721/irq.c index b417acc4dad0..d85022ea3f12 100644 --- a/arch/sh/boards/mach-se/7721/irq.c +++ b/arch/sh/boards/mach-se/7721/irq.c @@ -38,7 +38,7 @@ static DECLARE_INTC_DESC(intc_desc, "SE7721", vectors, void __init init_se7721_IRQ(void) { /* PPCR */ - ctrl_outw(ctrl_inw(0xa4050118) & ~0x00ff, 0xa4050118); + __raw_writew(__raw_readw(0xa4050118) & ~0x00ff, 0xa4050118); register_intc_controller(&intc_desc); intc_set_priority(MRSHPC_IRQ0, 0xf - MRSHPC_IRQ0); diff --git a/arch/sh/boards/mach-se/7721/setup.c b/arch/sh/boards/mach-se/7721/setup.c index 460da53b4961..7416ad7ee53a 100644 --- a/arch/sh/boards/mach-se/7721/setup.c +++ b/arch/sh/boards/mach-se/7721/setup.c @@ -80,10 +80,10 @@ device_initcall(se7721_devices_setup); static void __init se7721_setup(char **cmdline_p) { /* for USB */ - ctrl_outw(0x0000, 0xA405010C); /* PGCR */ - ctrl_outw(0x0000, 0xA405010E); /* PHCR */ - ctrl_outw(0x00AA, 0xA4050118); /* PPCR */ - ctrl_outw(0x0000, 0xA4050124); /* PSELA */ + __raw_writew(0x0000, 0xA405010C); /* PGCR */ + __raw_writew(0x0000, 0xA405010E); /* PHCR */ + __raw_writew(0x00AA, 0xA4050118); /* PPCR */ + __raw_writew(0x0000, 0xA4050124); /* PSELA */ } /* diff --git a/arch/sh/boards/mach-se/7722/irq.c b/arch/sh/boards/mach-se/7722/irq.c index b221b6842b0d..61605db04ee6 100644 --- a/arch/sh/boards/mach-se/7722/irq.c +++ b/arch/sh/boards/mach-se/7722/irq.c @@ -21,13 +21,13 @@ unsigned int se7722_fpga_irq[SE7722_FPGA_IRQ_NR] = { 0, }; static void disable_se7722_irq(unsigned int irq) { unsigned int bit = (unsigned int)get_irq_chip_data(irq); - ctrl_outw(ctrl_inw(IRQ01_MASK) | 1 << bit, IRQ01_MASK); + __raw_writew(__raw_readw(IRQ01_MASK) | 1 << bit, IRQ01_MASK); } static void enable_se7722_irq(unsigned int irq) { unsigned int bit = (unsigned int)get_irq_chip_data(irq); - ctrl_outw(ctrl_inw(IRQ01_MASK) & ~(1 << bit), IRQ01_MASK); + __raw_writew(__raw_readw(IRQ01_MASK) & ~(1 << bit), IRQ01_MASK); } static struct irq_chip se7722_irq_chip __read_mostly = { @@ -39,7 +39,7 @@ static struct irq_chip se7722_irq_chip __read_mostly = { static void se7722_irq_demux(unsigned int irq, struct irq_desc *desc) { - unsigned short intv = ctrl_inw(IRQ01_STS); + unsigned short intv = __raw_readw(IRQ01_STS); unsigned int ext_irq = 0; intv &= (1 << SE7722_FPGA_IRQ_NR) - 1; @@ -59,8 +59,8 @@ void __init init_se7722_IRQ(void) { int i, irq; - ctrl_outw(0, IRQ01_MASK); /* disable all irqs */ - ctrl_outw(0x2000, 0xb03fffec); /* mrshpc irq enable */ + __raw_writew(0, IRQ01_MASK); /* disable all irqs */ + __raw_writew(0x2000, 0xb03fffec); /* mrshpc irq enable */ for (i = 0; i < SE7722_FPGA_IRQ_NR; i++) { irq = create_irq(); diff --git a/arch/sh/boards/mach-se/7722/setup.c b/arch/sh/boards/mach-se/7722/setup.c index 93675418171d..80a4e571b310 100644 --- a/arch/sh/boards/mach-se/7722/setup.c +++ b/arch/sh/boards/mach-se/7722/setup.c @@ -156,32 +156,32 @@ device_initcall(se7722_devices_setup); static void __init se7722_setup(char **cmdline_p) { - ctrl_outw(0x010D, FPGA_OUT); /* FPGA */ + __raw_writew(0x010D, FPGA_OUT); /* FPGA */ - ctrl_outw(0x0000, PORT_PECR); /* PORT E 1 = IRQ5 ,E 0 = BS */ - ctrl_outw(0x1000, PORT_PJCR); /* PORT J 1 = IRQ1,J 0 =IRQ0 */ + __raw_writew(0x0000, PORT_PECR); /* PORT E 1 = IRQ5 ,E 0 = BS */ + __raw_writew(0x1000, PORT_PJCR); /* PORT J 1 = IRQ1,J 0 =IRQ0 */ /* LCDC I/O */ - ctrl_outw(0x0020, PORT_PSELD); + __raw_writew(0x0020, PORT_PSELD); /* SIOF1*/ - ctrl_outw(0x0003, PORT_PSELB); - ctrl_outw(0xe000, PORT_PSELC); - ctrl_outw(0x0000, PORT_PKCR); + __raw_writew(0x0003, PORT_PSELB); + __raw_writew(0xe000, PORT_PSELC); + __raw_writew(0x0000, PORT_PKCR); /* LCDC */ - ctrl_outw(0x4020, PORT_PHCR); - ctrl_outw(0x0000, PORT_PLCR); - ctrl_outw(0x0000, PORT_PMCR); - ctrl_outw(0x0002, PORT_PRCR); - ctrl_outw(0x0000, PORT_PXCR); /* LCDC,CS6A */ + __raw_writew(0x4020, PORT_PHCR); + __raw_writew(0x0000, PORT_PLCR); + __raw_writew(0x0000, PORT_PMCR); + __raw_writew(0x0002, PORT_PRCR); + __raw_writew(0x0000, PORT_PXCR); /* LCDC,CS6A */ /* KEYSC */ - ctrl_outw(0x0A10, PORT_PSELA); /* BS,SHHID2 */ - ctrl_outw(0x0000, PORT_PYCR); - ctrl_outw(0x0000, PORT_PZCR); - ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA); - ctrl_outw(ctrl_inw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC); + __raw_writew(0x0A10, PORT_PSELA); /* BS,SHHID2 */ + __raw_writew(0x0000, PORT_PYCR); + __raw_writew(0x0000, PORT_PZCR); + __raw_writew(__raw_readw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA); + __raw_writew(__raw_readw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC); } /* diff --git a/arch/sh/boards/mach-se/7724/irq.c b/arch/sh/boards/mach-se/7724/irq.c index f76cf3b49f23..e5e021a7d1e6 100644 --- a/arch/sh/boards/mach-se/7724/irq.c +++ b/arch/sh/boards/mach-se/7724/irq.c @@ -72,14 +72,14 @@ static void disable_se7724_irq(unsigned int irq) { struct fpga_irq set = get_fpga_irq(fpga2irq(irq)); unsigned int bit = irq - set.base; - ctrl_outw(ctrl_inw(set.mraddr) | 0x0001 << bit, set.mraddr); + __raw_writew(__raw_readw(set.mraddr) | 0x0001 << bit, set.mraddr); } static void enable_se7724_irq(unsigned int irq) { struct fpga_irq set = get_fpga_irq(fpga2irq(irq)); unsigned int bit = irq - set.base; - ctrl_outw(ctrl_inw(set.mraddr) & ~(0x0001 << bit), set.mraddr); + __raw_writew(__raw_readw(set.mraddr) & ~(0x0001 << bit), set.mraddr); } static struct irq_chip se7724_irq_chip __read_mostly = { @@ -92,7 +92,7 @@ static struct irq_chip se7724_irq_chip __read_mostly = { static void se7724_irq_demux(unsigned int irq, struct irq_desc *desc) { struct fpga_irq set = get_fpga_irq(irq); - unsigned short intv = ctrl_inw(set.sraddr); + unsigned short intv = __raw_readw(set.sraddr); struct irq_desc *ext_desc; unsigned int ext_irq = set.base; @@ -115,13 +115,13 @@ void __init init_se7724_IRQ(void) { int i; - ctrl_outw(0xffff, IRQ0_MR); /* mask all */ - ctrl_outw(0xffff, IRQ1_MR); /* mask all */ - ctrl_outw(0xffff, IRQ2_MR); /* mask all */ - ctrl_outw(0x0000, IRQ0_SR); /* clear irq */ - ctrl_outw(0x0000, IRQ1_SR); /* clear irq */ - ctrl_outw(0x0000, IRQ2_SR); /* clear irq */ - ctrl_outw(0x002a, IRQ_MODE); /* set irq type */ + __raw_writew(0xffff, IRQ0_MR); /* mask all */ + __raw_writew(0xffff, IRQ1_MR); /* mask all */ + __raw_writew(0xffff, IRQ2_MR); /* mask all */ + __raw_writew(0x0000, IRQ0_SR); /* clear irq */ + __raw_writew(0x0000, IRQ1_SR); /* clear irq */ + __raw_writew(0x0000, IRQ2_SR); /* clear irq */ + __raw_writew(0x002a, IRQ_MODE); /* set irq type */ for (i = 0; i < SE7724_FPGA_IRQ_NR; i++) set_irq_chip_and_handler_name(SE7724_FPGA_IRQ_BASE + i, diff --git a/arch/sh/boards/mach-se/7724/setup.c b/arch/sh/boards/mach-se/7724/setup.c index cbfba783ee49..242dc843f574 100644 --- a/arch/sh/boards/mach-se/7724/setup.c +++ b/arch/sh/boards/mach-se/7724/setup.c @@ -256,12 +256,12 @@ static struct platform_device ceu1_device = { #define FCLKACR 0xa4150008 static void fsimck_init(struct clk *clk) { - u32 status = ctrl_inl(clk->enable_reg); + u32 status = __raw_readl(clk->enable_reg); /* use external clock */ status &= ~0x000000ff; status |= 0x00000080; - ctrl_outl(status, clk->enable_reg); + __raw_writel(status, clk->enable_reg); } static struct clk_ops fsimck_clk_ops = { @@ -522,7 +522,7 @@ static int __init sh_eth_is_eeprom_ready(void) int t = 10000; while (t--) { - if (!ctrl_inw(EEPROM_STAT)) + if (!__raw_readw(EEPROM_STAT)) return 1; cpu_relax(); } @@ -542,13 +542,13 @@ static void __init sh_eth_init(void) /* read MAC addr from EEPROM */ for (i = 0 ; i < 3 ; i++) { - ctrl_outw(0x0, EEPROM_OP); /* read */ - ctrl_outw(i*2, EEPROM_ADR); - ctrl_outw(0x1, EEPROM_STRT); + __raw_writew(0x0, EEPROM_OP); /* read */ + __raw_writew(i*2, EEPROM_ADR); + __raw_writew(0x1, EEPROM_STRT); if (!sh_eth_is_eeprom_ready()) return; - mac = ctrl_inw(EEPROM_DATA); + mac = __raw_readw(EEPROM_DATA); sh_eth_plat.mac_addr[i << 1] = mac & 0xff; sh_eth_plat.mac_addr[(i << 1) + 1] = mac >> 8; } @@ -585,7 +585,7 @@ arch_initcall(arch_setup); static int __init devices_setup(void) { - u16 sw = ctrl_inw(SW4140); /* select camera, monitor */ + u16 sw = __raw_readw(SW4140); /* select camera, monitor */ struct clk *fsia_clk; /* register board specific self-refresh code */ @@ -595,7 +595,7 @@ static int __init devices_setup(void) &ms7724se_sdram_leave_start, &ms7724se_sdram_leave_end); /* Reset Release */ - ctrl_outw(ctrl_inw(FPGA_OUT) & + __raw_writew(__raw_readw(FPGA_OUT) & ~((1 << 1) | /* LAN */ (1 << 6) | /* VIDEO DAC */ (1 << 7) | /* AK4643 */ @@ -604,7 +604,7 @@ static int __init devices_setup(void) FPGA_OUT); /* turn on USB clocks, use external clock */ - ctrl_outw((ctrl_inw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB); + __raw_writew((__raw_readw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB); #ifdef CONFIG_PM /* Let LED9 show STATUS2 */ @@ -633,10 +633,10 @@ static int __init devices_setup(void) #endif /* enable USB0 port */ - ctrl_outw(0x0600, 0xa40501d4); + __raw_writew(0x0600, 0xa40501d4); /* enable USB1 port */ - ctrl_outw(0x0600, 0xa4050192); + __raw_writew(0x0600, 0xa4050192); /* enable IRQ 0,1,2 */ gpio_request(GPIO_FN_INTC_IRQ0, NULL); @@ -684,7 +684,7 @@ static int __init devices_setup(void) gpio_request(GPIO_FN_LCDVCPWC, NULL); gpio_request(GPIO_FN_LCDRD, NULL); gpio_request(GPIO_FN_LCDLCLK, NULL); - ctrl_outw((ctrl_inw(PORT_HIZA) & ~0x0001), PORT_HIZA); + __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA); /* enable CEU0 */ gpio_request(GPIO_FN_VIO0_D15, NULL); diff --git a/arch/sh/boards/mach-se/7780/irq.c b/arch/sh/boards/mach-se/7780/irq.c index 121744c08714..d5c9edc172a3 100644 --- a/arch/sh/boards/mach-se/7780/irq.c +++ b/arch/sh/boards/mach-se/7780/irq.c @@ -24,30 +24,30 @@ void __init init_se7780_IRQ(void) { /* enable all interrupt at FPGA */ - ctrl_outw(0, FPGA_INTMSK1); + __raw_writew(0, FPGA_INTMSK1); /* mask SM501 interrupt */ - ctrl_outw((ctrl_inw(FPGA_INTMSK1) | 0x0002), FPGA_INTMSK1); + __raw_writew((__raw_readw(FPGA_INTMSK1) | 0x0002), FPGA_INTMSK1); /* enable all interrupt at FPGA */ - ctrl_outw(0, FPGA_INTMSK2); + __raw_writew(0, FPGA_INTMSK2); /* set FPGA INTSEL register */ /* FPGA + 0x06 */ - ctrl_outw( ((IRQPIN_SM501 << IRQPOS_SM501) | + __raw_writew( ((IRQPIN_SM501 << IRQPOS_SM501) | (IRQPIN_SMC91CX << IRQPOS_SMC91CX)), FPGA_INTSEL1); /* FPGA + 0x08 */ - ctrl_outw(((IRQPIN_EXTINT4 << IRQPOS_EXTINT4) | + __raw_writew(((IRQPIN_EXTINT4 << IRQPOS_EXTINT4) | (IRQPIN_EXTINT3 << IRQPOS_EXTINT3) | (IRQPIN_EXTINT2 << IRQPOS_EXTINT2) | (IRQPIN_EXTINT1 << IRQPOS_EXTINT1)), FPGA_INTSEL2); /* FPGA + 0x0A */ - ctrl_outw((IRQPIN_PCCPW << IRQPOS_PCCPW), FPGA_INTSEL3); + __raw_writew((IRQPIN_PCCPW << IRQPOS_PCCPW), FPGA_INTSEL3); plat_irq_setup_pins(IRQ_MODE_IRQ); /* install handlers for IRQ0-7 */ /* ICR1: detect low level(for 2ndcut) */ - ctrl_outl(0xAAAA0000, INTC_ICR1); + __raw_writel(0xAAAA0000, INTC_ICR1); /* * FPGA PCISEL register initialize @@ -63,6 +63,6 @@ void __init init_se7780_IRQ(void) * INTD || INTD | INTC | -- | INTA * ------------------------------------- */ - ctrl_outw(0x0013, FPGA_PCI_INTSEL1); - ctrl_outw(0xE402, FPGA_PCI_INTSEL2); + __raw_writew(0x0013, FPGA_PCI_INTSEL1); + __raw_writew(0xE402, FPGA_PCI_INTSEL2); } diff --git a/arch/sh/boards/mach-se/7780/setup.c b/arch/sh/boards/mach-se/7780/setup.c index f7bfb3f83692..6f7c207138e1 100644 --- a/arch/sh/boards/mach-se/7780/setup.c +++ b/arch/sh/boards/mach-se/7780/setup.c @@ -75,14 +75,14 @@ device_initcall(se7780_devices_setup); static void __init se7780_setup(char **cmdline_p) { /* "SH-Linux" on LED Display */ - ctrl_outw( 'S' , PA_LED_DISP + (DISP_SEL0_ADDR << 1) ); - ctrl_outw( 'H' , PA_LED_DISP + (DISP_SEL1_ADDR << 1) ); - ctrl_outw( '-' , PA_LED_DISP + (DISP_SEL2_ADDR << 1) ); - ctrl_outw( 'L' , PA_LED_DISP + (DISP_SEL3_ADDR << 1) ); - ctrl_outw( 'i' , PA_LED_DISP + (DISP_SEL4_ADDR << 1) ); - ctrl_outw( 'n' , PA_LED_DISP + (DISP_SEL5_ADDR << 1) ); - ctrl_outw( 'u' , PA_LED_DISP + (DISP_SEL6_ADDR << 1) ); - ctrl_outw( 'x' , PA_LED_DISP + (DISP_SEL7_ADDR << 1) ); + __raw_writew( 'S' , PA_LED_DISP + (DISP_SEL0_ADDR << 1) ); + __raw_writew( 'H' , PA_LED_DISP + (DISP_SEL1_ADDR << 1) ); + __raw_writew( '-' , PA_LED_DISP + (DISP_SEL2_ADDR << 1) ); + __raw_writew( 'L' , PA_LED_DISP + (DISP_SEL3_ADDR << 1) ); + __raw_writew( 'i' , PA_LED_DISP + (DISP_SEL4_ADDR << 1) ); + __raw_writew( 'n' , PA_LED_DISP + (DISP_SEL5_ADDR << 1) ); + __raw_writew( 'u' , PA_LED_DISP + (DISP_SEL6_ADDR << 1) ); + __raw_writew( 'x' , PA_LED_DISP + (DISP_SEL7_ADDR << 1) ); printk(KERN_INFO "Hitachi UL Solutions Engine 7780SE03 support.\n"); @@ -93,15 +93,15 @@ static void __init se7780_setup(char **cmdline_p) * REQ2/GNT2 -> Serial ATA * REQ3/GNT3 -> PCI slot */ - ctrl_outw(0x0213, FPGA_REQSEL); + __raw_writew(0x0213, FPGA_REQSEL); /* GPIO setting */ - ctrl_outw(0x0000, GPIO_PECR); - ctrl_outw(ctrl_inw(GPIO_PHCR)&0xfff3, GPIO_PHCR); - ctrl_outw(0x0c00, GPIO_PMSELR); + __raw_writew(0x0000, GPIO_PECR); + __raw_writew(__raw_readw(GPIO_PHCR)&0xfff3, GPIO_PHCR); + __raw_writew(0x0c00, GPIO_PMSELR); /* iVDR Power ON */ - ctrl_outw(0x0001, FPGA_IVDRPW); + __raw_writew(0x0001, FPGA_IVDRPW); } /* |