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author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2008-08-07 09:55:03 +0100 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-08-07 09:55:03 +0100 |
commit | 4fb8af10d0fd09372d52966b76922b9e82bbc950 (patch) | |
tree | d240e4d40357583e3f3eb228dccf20122a5b31ed /arch/sh/include/cpu-sh4/cpu/cacheflush.h | |
parent | f44f82e8a20b98558486eb14497b2f71c78fa325 (diff) | |
parent | 64a99d2a8c3ed5c4e39f3ae1cc682aa8fd3977fc (diff) | |
download | linux-stable-4fb8af10d0fd09372d52966b76922b9e82bbc950.tar.gz linux-stable-4fb8af10d0fd09372d52966b76922b9e82bbc950.tar.bz2 linux-stable-4fb8af10d0fd09372d52966b76922b9e82bbc950.zip |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/sam/kbuild-fixes
Diffstat (limited to 'arch/sh/include/cpu-sh4/cpu/cacheflush.h')
-rw-r--r-- | arch/sh/include/cpu-sh4/cpu/cacheflush.h | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/arch/sh/include/cpu-sh4/cpu/cacheflush.h b/arch/sh/include/cpu-sh4/cpu/cacheflush.h new file mode 100644 index 000000000000..065306d376eb --- /dev/null +++ b/arch/sh/include/cpu-sh4/cpu/cacheflush.h @@ -0,0 +1,43 @@ +/* + * include/asm-sh/cpu-sh4/cacheflush.h + * + * Copyright (C) 1999 Niibe Yutaka + * Copyright (C) 2003 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#ifndef __ASM_CPU_SH4_CACHEFLUSH_H +#define __ASM_CPU_SH4_CACHEFLUSH_H + +/* + * Caches are broken on SH-4 (unless we use write-through + * caching; in which case they're only semi-broken), + * so we need them. + */ +void flush_cache_all(void); +void flush_dcache_all(void); +void flush_cache_mm(struct mm_struct *mm); +#define flush_cache_dup_mm(mm) flush_cache_mm(mm) +void flush_cache_range(struct vm_area_struct *vma, unsigned long start, + unsigned long end); +void flush_cache_page(struct vm_area_struct *vma, unsigned long addr, + unsigned long pfn); +void flush_dcache_page(struct page *pg); + +#define flush_dcache_mmap_lock(mapping) do { } while (0) +#define flush_dcache_mmap_unlock(mapping) do { } while (0) + +void flush_icache_range(unsigned long start, unsigned long end); +void flush_icache_user_range(struct vm_area_struct *vma, struct page *page, + unsigned long addr, int len); + +#define flush_icache_page(vma,pg) do { } while (0) + +/* Initialization of P3 area for copy_user_page */ +void p3_cache_init(void); + +#define PG_mapped PG_arch_1 + +#endif /* __ASM_CPU_SH4_CACHEFLUSH_H */ |