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author | Chris Metcalf <cmetcalf@tilera.com> | 2013-08-06 16:04:13 -0400 |
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committer | Chris Metcalf <cmetcalf@tilera.com> | 2013-08-13 16:04:10 -0400 |
commit | 2f9ac29eec71a696cb0dcc5fb82c0f8d4dac28c9 (patch) | |
tree | ee33ba7e452e8614130a811211eb2383a3133194 /arch/tile/include/asm/thread_info.h | |
parent | f10da5472c6907a3fbd6886224b36d21925ce47b (diff) | |
download | linux-stable-2f9ac29eec71a696cb0dcc5fb82c0f8d4dac28c9.tar.gz linux-stable-2f9ac29eec71a696cb0dcc5fb82c0f8d4dac28c9.tar.bz2 linux-stable-2f9ac29eec71a696cb0dcc5fb82c0f8d4dac28c9.zip |
tile: fast-path unaligned memory access for tilegx
This change enables unaligned userspace memory access via a kernel
fast path on tilegx. The kernel tracks user PC/instruction pairs
per-thread using a direct-mapped cache in userspace. The cache
maps those PC/instruction pairs to JIT'ed instruction sequences that
load or store using byte-wide load store intructions and then
synthesize 2-, 4- or 8-byte load or store results. Once an
instruction has been seen to generate an unaligned access once,
subsequent hits on that instruction typically require overhead
of only around 50 cycles if cache and TLB is hot.
We support the prctl() PR_GET_UNALIGN / PR_SET_UNALIGN sys call to
enable or disable unaligned fixups on a per-process basis.
To do this we pull some of the tilepro unaligned support out of the
single_step.c file; tilepro uses instruction disassembly for both
single-step and unaligned access support. Since tilegx actually has
hardware singlestep support, though, it's cleaner to keep the tilegx
unaligned access code in a separate file. While we're at it,
properly rename the tilepro-specific types, etc., to have tilepro
suffixes instead of generic tile suffixes.
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Diffstat (limited to 'arch/tile/include/asm/thread_info.h')
-rw-r--r-- | arch/tile/include/asm/thread_info.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/tile/include/asm/thread_info.h b/arch/tile/include/asm/thread_info.h index d1733dee98a2..b8aa6df3e102 100644 --- a/arch/tile/include/asm/thread_info.h +++ b/arch/tile/include/asm/thread_info.h @@ -39,6 +39,11 @@ struct thread_info { struct restart_block restart_block; struct single_step_state *step_state; /* single step state (if non-zero) */ + int align_ctl; /* controls unaligned access */ +#ifdef __tilegx__ + unsigned long unalign_jit_tmp[4]; /* temp r0..r3 storage */ + void __user *unalign_jit_base; /* unalign fixup JIT base */ +#endif }; /* @@ -56,6 +61,7 @@ struct thread_info { .fn = do_no_restart_syscall, \ }, \ .step_state = NULL, \ + .align_ctl = 0, \ } #define init_thread_info (init_thread_union.thread_info) |