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authorChris Metcalf <cmetcalf@tilera.com>2010-08-13 08:32:21 -0400
committerChris Metcalf <cmetcalf@tilera.com>2010-08-13 08:32:21 -0400
commit32020effaf713c0c669864301bcd5dac6b9bb9e0 (patch)
tree86bca127e785fe2170bfec548ebc6be549a842b8 /arch/tile/include
parent749dc6f252b57d5cb9c1f4c1c4aafe4c92a28207 (diff)
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arch/tile: Fix a couple of issues with the COMPAT code for TILE-Gx.
First, the siginfo preamble wasn't quite right; we need to indicate that we are padding up to 4 ints of preamble for 64-bit code, and then for compat mode we need to pad differently, using only 3 ints. Second, the C ABI requires a save area of two registers, not two pointers, since in compat mode we have 64-bit registers all of which we need to save, even though we only have 32-bit VAs. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Diffstat (limited to 'arch/tile/include')
-rw-r--r--arch/tile/include/arch/abi.h4
-rw-r--r--arch/tile/include/asm/siginfo.h4
2 files changed, 5 insertions, 3 deletions
diff --git a/arch/tile/include/arch/abi.h b/arch/tile/include/arch/abi.h
index da8df5b9d914..8affc76f771a 100644
--- a/arch/tile/include/arch/abi.h
+++ b/arch/tile/include/arch/abi.h
@@ -59,9 +59,7 @@
* The ABI requires callers to allocate a caller state save area of
* this many bytes at the bottom of each stack frame.
*/
-#ifdef __tile__
-#define C_ABI_SAVE_AREA_SIZE (2 * __SIZEOF_POINTER__)
-#endif
+#define C_ABI_SAVE_AREA_SIZE (2 * (CHIP_WORD_SIZE() / 8))
/**
* The operand to an 'info' opcode directing the backtracer to not
diff --git a/arch/tile/include/asm/siginfo.h b/arch/tile/include/asm/siginfo.h
index 0c12d1b9ddf2..56d661bb010b 100644
--- a/arch/tile/include/asm/siginfo.h
+++ b/arch/tile/include/asm/siginfo.h
@@ -17,6 +17,10 @@
#define __ARCH_SI_TRAPNO
+#ifdef __LP64__
+# define __ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int))
+#endif
+
#include <asm-generic/siginfo.h>
/*