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author | Chris Metcalf <cmetcalf@tilera.com> | 2010-08-13 08:52:19 -0400 |
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committer | Chris Metcalf <cmetcalf@tilera.com> | 2010-08-13 08:52:19 -0400 |
commit | c745a8a11fa1df6078bfc61fc29492ed43f71c2b (patch) | |
tree | 2db1cdf9cd0d0e892f4f92de1fd2700ac319f04a /arch/tile/mm | |
parent | 1fcbe027b5d29ec9cd0eeb753c14fb366ae852ac (diff) | |
download | linux-stable-c745a8a11fa1df6078bfc61fc29492ed43f71c2b.tar.gz linux-stable-c745a8a11fa1df6078bfc61fc29492ed43f71c2b.tar.bz2 linux-stable-c745a8a11fa1df6078bfc61fc29492ed43f71c2b.zip |
arch/tile: Various cleanups.
This change rolls up random cleanups not representing any actual bugs.
- Remove a stale CONFIG_ value from the default tile_defconfig
- Remove unused tns_atomic_xxx() family of methods from <asm/atomic.h>
- Optimize get_order() using Tile's "clz" instruction
- Fix a bad hypervisor upcall name (not currently used in Linux anyway)
- Use __copy_in_user_inatomic() name for consistency, and export it
- Export some additional hypervisor driver I/O upcalls and some homecache calls
- Remove the obfuscating MEMCPY_TEST_WH64 support code
- Other stray comment cleanups, #if 0 removal, etc.
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Diffstat (limited to 'arch/tile/mm')
-rw-r--r-- | arch/tile/mm/fault.c | 8 | ||||
-rw-r--r-- | arch/tile/mm/homecache.c | 3 |
2 files changed, 11 insertions, 0 deletions
diff --git a/arch/tile/mm/fault.c b/arch/tile/mm/fault.c index 0011f06b4fe2..704f3e8a4385 100644 --- a/arch/tile/mm/fault.c +++ b/arch/tile/mm/fault.c @@ -567,6 +567,14 @@ do_sigbus: * since that might indicate we have not yet squirreled the SPR * contents away and can thus safely take a recursive interrupt. * Accordingly, the hypervisor passes us the PC via SYSTEM_SAVE_1_2. + * + * Note that this routine is called before homecache_tlb_defer_enter(), + * which means that we can properly unlock any atomics that might + * be used there (good), but also means we must be very sensitive + * to not touch any data structures that might be located in memory + * that could migrate, as we could be entering the kernel on a dataplane + * cpu that has been deferring kernel TLB updates. This means, for + * example, that we can't migrate init_mm or its pgd. */ struct intvec_state do_page_fault_ics(struct pt_regs *regs, int fault_num, unsigned long address, diff --git a/arch/tile/mm/homecache.c b/arch/tile/mm/homecache.c index 97c478e7be27..fb3b4a55cec4 100644 --- a/arch/tile/mm/homecache.c +++ b/arch/tile/mm/homecache.c @@ -29,6 +29,7 @@ #include <linux/timex.h> #include <linux/cache.h> #include <linux/smp.h> +#include <linux/module.h> #include <asm/page.h> #include <asm/sections.h> @@ -348,6 +349,7 @@ pte_t pte_set_home(pte_t pte, int home) return pte; } +EXPORT_SYMBOL(pte_set_home); /* * The routines in this section are the "static" versions of the normal @@ -403,6 +405,7 @@ struct page *homecache_alloc_pages(gfp_t gfp_mask, homecache_change_page_home(page, order, home); return page; } +EXPORT_SYMBOL(homecache_alloc_pages); struct page *homecache_alloc_pages_node(int nid, gfp_t gfp_mask, unsigned int order, int home) |