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| author | Borislav Petkov <bp@suse.de> | 2016-09-12 09:59:41 +0200 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2016-09-13 15:23:14 +0200 |
| commit | 7cc4ef8ed132e72ba44804cae3ddb2587ff757d6 (patch) | |
| tree | dbaccd7723b8cf4cbe5a6701747f21bfc7817848 /arch/x86/ras | |
| parent | a884675b873a0185d2626d1f304987c94cef6d74 (diff) | |
| download | linux-stable-7cc4ef8ed132e72ba44804cae3ddb2587ff757d6.tar.gz linux-stable-7cc4ef8ed132e72ba44804cae3ddb2587ff757d6.tar.bz2 linux-stable-7cc4ef8ed132e72ba44804cae3ddb2587ff757d6.zip | |
x86/RAS/mce_amd_inj: Fix some W= warnings
In particular:
arch/x86/ras/mce_amd_inj.c: In function ‘prepare_msrs’:
arch/x86/ras/mce_amd_inj.c:249:13: warning: declaration of ‘i_mce’ shadows a global declaration [-Wshadow]
struct mce i_mce = *(struct mce *)info;
^~~~~
arch/x86/ras/mce_amd_inj.c: In function ‘init_mce_inject’:
arch/x86/ras/mce_amd_inj.c:453:16: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
for (i = 0; i < ARRAY_SIZE(dfs_fls); i++) {
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: http://lkml.kernel.org/r/20160912075941.24699-16-bp@alien8.de
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86/ras')
| -rw-r--r-- | arch/x86/ras/mce_amd_inj.c | 29 |
1 files changed, 14 insertions, 15 deletions
diff --git a/arch/x86/ras/mce_amd_inj.c b/arch/x86/ras/mce_amd_inj.c index f4b442cc8a3e..cd318d93099e 100644 --- a/arch/x86/ras/mce_amd_inj.c +++ b/arch/x86/ras/mce_amd_inj.c @@ -246,28 +246,27 @@ static void toggle_nb_mca_mst_cpu(u16 nid) static void prepare_msrs(void *info) { - struct mce i_mce = *(struct mce *)info; - u8 b = i_mce.bank; + struct mce m = *(struct mce *)info; + u8 b = m.bank; - wrmsrl(MSR_IA32_MCG_STATUS, i_mce.mcgstatus); + wrmsrl(MSR_IA32_MCG_STATUS, m.mcgstatus); if (boot_cpu_has(X86_FEATURE_SMCA)) { - if (i_mce.inject_flags == DFR_INT_INJ) { - wrmsrl(MSR_AMD64_SMCA_MCx_DESTAT(b), i_mce.status); - wrmsrl(MSR_AMD64_SMCA_MCx_DEADDR(b), i_mce.addr); + if (m.inject_flags == DFR_INT_INJ) { + wrmsrl(MSR_AMD64_SMCA_MCx_DESTAT(b), m.status); + wrmsrl(MSR_AMD64_SMCA_MCx_DEADDR(b), m.addr); } else { - wrmsrl(MSR_AMD64_SMCA_MCx_STATUS(b), i_mce.status); - wrmsrl(MSR_AMD64_SMCA_MCx_ADDR(b), i_mce.addr); + wrmsrl(MSR_AMD64_SMCA_MCx_STATUS(b), m.status); + wrmsrl(MSR_AMD64_SMCA_MCx_ADDR(b), m.addr); } - wrmsrl(MSR_AMD64_SMCA_MCx_MISC(b), i_mce.misc); - wrmsrl(MSR_AMD64_SMCA_MCx_SYND(b), i_mce.synd); + wrmsrl(MSR_AMD64_SMCA_MCx_MISC(b), m.misc); + wrmsrl(MSR_AMD64_SMCA_MCx_SYND(b), m.synd); } else { - wrmsrl(MSR_IA32_MCx_STATUS(b), i_mce.status); - wrmsrl(MSR_IA32_MCx_ADDR(b), i_mce.addr); - wrmsrl(MSR_IA32_MCx_MISC(b), i_mce.misc); + wrmsrl(MSR_IA32_MCx_STATUS(b), m.status); + wrmsrl(MSR_IA32_MCx_ADDR(b), m.addr); + wrmsrl(MSR_IA32_MCx_MISC(b), m.misc); } - } static void do_inject(void) @@ -441,7 +440,7 @@ static struct dfs_node { static int __init init_mce_inject(void) { - int i; + unsigned int i; u64 cap; rdmsrl(MSR_IA32_MCG_CAP, cap); |