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authorMax Filippov <jcmvbkbc@gmail.com>2014-10-04 03:50:33 +0400
committerMax Filippov <jcmvbkbc@gmail.com>2014-10-21 13:28:58 +0400
commit5a0b1d78bfc5ca4079ea03abb0ecc0d61d676e41 (patch)
treeea6a9594c87a8cdd2b6eec457ee709a64172cfc6 /arch/xtensa/include/asm/page.h
parent566fb58ed422537715023d1f19b705247a640b11 (diff)
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xtensa: nommu: clean up memory map dump
noMMU configuration doesn't use special area for vmalloc allocations, don't print it in the memory map. PAGE_OFFSET is fixed to 0 in noMMU, use min_low_pfn and max_low_pfn for lowmem range display. Make all XCHAL_KSEG_* constants unsigned long for consistency with other addresses. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'arch/xtensa/include/asm/page.h')
-rw-r--r--arch/xtensa/include/asm/page.h10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/xtensa/include/asm/page.h b/arch/xtensa/include/asm/page.h
index 619a51bb0163..ad38500471fa 100644
--- a/arch/xtensa/include/asm/page.h
+++ b/arch/xtensa/include/asm/page.h
@@ -20,10 +20,10 @@
* Fixed TLB translations in the processor.
*/
-#define XCHAL_KSEG_CACHED_VADDR 0xd0000000
-#define XCHAL_KSEG_BYPASS_VADDR 0xd8000000
-#define XCHAL_KSEG_PADDR 0x00000000
-#define XCHAL_KSEG_SIZE 0x08000000
+#define XCHAL_KSEG_CACHED_VADDR __XTENSA_UL_CONST(0xd0000000)
+#define XCHAL_KSEG_BYPASS_VADDR __XTENSA_UL_CONST(0xd8000000)
+#define XCHAL_KSEG_PADDR __XTENSA_UL_CONST(0x00000000)
+#define XCHAL_KSEG_SIZE __XTENSA_UL_CONST(0x08000000)
/*
* PAGE_SHIFT determines the page size
@@ -37,7 +37,7 @@
#define PAGE_OFFSET XCHAL_KSEG_CACHED_VADDR
#define MAX_MEM_PFN XCHAL_KSEG_SIZE
#else
-#define PAGE_OFFSET 0
+#define PAGE_OFFSET __XTENSA_UL_CONST(0)
#define MAX_MEM_PFN (PLATFORM_DEFAULT_MEM_START + PLATFORM_DEFAULT_MEM_SIZE)
#endif