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author | Thomas Gleixner <tglx@linutronix.de> | 2011-03-24 18:28:40 +0100 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2011-03-24 20:35:59 +0100 |
commit | 47a5d9dcbb595b1bef54f59ba3846170e13be32a (patch) | |
tree | bfb8b9b2321970723b145db8d363c79bfaf2bca4 /arch/xtensa | |
parent | 610e1756eafdeca15cc24ade6dae23d8129225f9 (diff) | |
download | linux-stable-47a5d9dcbb595b1bef54f59ba3846170e13be32a.tar.gz linux-stable-47a5d9dcbb595b1bef54f59ba3846170e13be32a.tar.bz2 linux-stable-47a5d9dcbb595b1bef54f59ba3846170e13be32a.zip |
xtensa: Use generic show_interrupts()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/xtensa')
-rw-r--r-- | arch/xtensa/Kconfig | 1 | ||||
-rw-r--r-- | arch/xtensa/kernel/irq.c | 53 |
2 files changed, 10 insertions, 44 deletions
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig index a1c7482ad0ec..d0ecf7e2a9b6 100644 --- a/arch/xtensa/Kconfig +++ b/arch/xtensa/Kconfig @@ -8,6 +8,7 @@ config XTENSA def_bool y select HAVE_IDE select HAVE_GENERIC_HARDIRQS + select GENERIC_IRQ_SHOW select GENERIC_HARDIRQS_NO_DEPRECATED help Xtensa processors are 32-bit RISC machines designed by Tensilica diff --git a/arch/xtensa/kernel/irq.c b/arch/xtensa/kernel/irq.c index 98c0d6bafdf2..d77089df412e 100644 --- a/arch/xtensa/kernel/irq.c +++ b/arch/xtensa/kernel/irq.c @@ -62,51 +62,16 @@ asmlinkage void do_IRQ(int irq, struct pt_regs *regs) set_irq_regs(old_regs); } -/* - * Generic, controller-independent functions: - */ - -int show_interrupts(struct seq_file *p, void *v) +int arch_show_interrupts(struct seq_file *p, int prec) { - int i = *(loff_t *) v, j; - struct irqaction * action; - unsigned long flags; - - if (i == 0) { - seq_printf(p, " "); - for_each_online_cpu(j) - seq_printf(p, "CPU%d ",j); - seq_putc(p, '\n'); - } - - if (i < NR_IRQS) { - raw_spin_lock_irqsave(&irq_desc[i].lock, flags); - action = irq_desc[i].action; - if (!action) - goto skip; - seq_printf(p, "%3d: ",i); -#ifndef CONFIG_SMP - seq_printf(p, "%10u ", kstat_irqs(i)); -#else - for_each_online_cpu(j) - seq_printf(p, "%10u ", kstat_irqs_cpu(i, j)); -#endif - seq_printf(p, " %14s", irq_desc[i].chip->name); - seq_printf(p, " %s", action->name); - - for (action=action->next; action; action = action->next) - seq_printf(p, ", %s", action->name); - - seq_putc(p, '\n'); -skip: - raw_spin_unlock_irqrestore(&irq_desc[i].lock, flags); - } else if (i == NR_IRQS) { - seq_printf(p, "NMI: "); - for_each_online_cpu(j) - seq_printf(p, "%10u ", nmi_count(j)); - seq_putc(p, '\n'); - seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count)); - } + int j; + + seq_printf(p, "%*s: ", prec, "NMI"); + for_each_online_cpu(j) + seq_printf(p, "%10u ", nmi_count(j)); + seq_putc(p, '\n'); + seq_printf(p, "%*s: ", prec, "ERR"); + seq_printf(p, "%10u\n", atomic_read(&irq_err_count)); return 0; } |