diff options
author | Daniel Mack <daniel@caiaq.de> | 2010-02-03 08:01:28 +0800 |
---|---|---|
committer | Jiri Kosina <jkosina@suse.cz> | 2010-02-09 11:13:56 +0100 |
commit | 3ad2f3fbb961429d2aa627465ae4829758bc7e07 (patch) | |
tree | f365c513e8f5b477a61336a600ff54f32b7ad6e1 /arch | |
parent | 1537a3638cbf741d3826c1002026cce487a6bee0 (diff) | |
download | linux-stable-3ad2f3fbb961429d2aa627465ae4829758bc7e07.tar.gz linux-stable-3ad2f3fbb961429d2aa627465ae4829758bc7e07.tar.bz2 linux-stable-3ad2f3fbb961429d2aa627465ae4829758bc7e07.zip |
tree-wide: Assorted spelling fixes
In particular, several occurances of funny versions of 'success',
'unknown', 'therefore', 'acknowledge', 'argument', 'achieve', 'address',
'beginning', 'desirable', 'separate' and 'necessary' are fixed.
Signed-off-by: Daniel Mack <daniel@caiaq.de>
Cc: Joe Perches <joe@perches.com>
Cc: Junio C Hamano <gitster@pobox.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Diffstat (limited to 'arch')
24 files changed, 39 insertions, 39 deletions
diff --git a/arch/arm/mach-ep93xx/micro9.c b/arch/arm/mach-ep93xx/micro9.c index f3757a1c5a10..c33360e82868 100644 --- a/arch/arm/mach-ep93xx/micro9.c +++ b/arch/arm/mach-ep93xx/micro9.c @@ -28,7 +28,7 @@ * * Micro9-High has up to 64MB of 32-bit flash on CS1 * Micro9-Mid has up to 64MB of either 32-bit or 16-bit flash on CS1 - * Micro9-Lite uses a seperate MTD map driver for flash support + * Micro9-Lite uses a separate MTD map driver for flash support * Micro9-Slim has up to 64MB of either 32-bit or 16-bit flash on CS1 *************************************************************************/ static struct physmap_flash_data micro9_flash_data; diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c index 9438bf6613a3..ab3712c86d2b 100644 --- a/arch/arm/mach-nomadik/board-nhk8815.c +++ b/arch/arm/mach-nomadik/board-nhk8815.c @@ -38,7 +38,7 @@ #define SRC_CR_INIT_MASK 0x00007fff #define SRC_CR_INIT_VAL 0x2aaa8000 -/* These adresses span 16MB, so use three individual pages */ +/* These addresses span 16MB, so use three individual pages */ static struct resource nhk8815_nand_resources[] = { { .name = "nand_addr", diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c index 653e25be3dd8..d0cb5e940776 100644 --- a/arch/arm/mach-u300/core.c +++ b/arch/arm/mach-u300/core.c @@ -356,7 +356,7 @@ static struct resource ave_resources[] = { /* * The AVE3e requires two regions of 256MB that it considers * "invisible". The hardware will not be able to access these - * adresses, so they should never point to system RAM. + * addresses, so they should never point to system RAM. */ { .name = "AVE3e Reserved 0", @@ -571,7 +571,7 @@ static void __init u300_init_check_chip(void) /* * Some devices and their resources require reserved physical memory from * the end of the available RAM. This function traverses the list of devices - * and assigns actual adresses to these. + * and assigns actual addresses to these. */ static void __init u300_assign_physmem(void) { diff --git a/arch/arm/mach-u300/include/mach/debug-macro.S b/arch/arm/mach-u300/include/mach/debug-macro.S index f3a1cbbeeab3..d591fe13ed13 100644 --- a/arch/arm/mach-u300/include/mach/debug-macro.S +++ b/arch/arm/mach-u300/include/mach/debug-macro.S @@ -11,7 +11,7 @@ #include <mach/hardware.h> .macro addruart,rx - /* If we move the adress using MMU, use this. */ + /* If we move the address using MMU, use this. */ mrc p15, 0, \rx, c1, c0 tst \rx, #1 @ MMU enabled? ldreq \rx, = U300_SLOW_PER_PHYS_BASE @ MMU off, physical address diff --git a/arch/arm/plat-s3c/include/plat/gpio-cfg-helpers.h b/arch/arm/plat-s3c/include/plat/gpio-cfg-helpers.h index 652e2bbdaa20..dda19da037ad 100644 --- a/arch/arm/plat-s3c/include/plat/gpio-cfg-helpers.h +++ b/arch/arm/plat-s3c/include/plat/gpio-cfg-helpers.h @@ -78,7 +78,7 @@ extern int s3c_gpio_setcfg_s3c24xx_a(struct s3c_gpio_chip *chip, * others = Special functions (dependant on bank) * * Note, since the code to deal with the case where there are two control - * registers instead of one, we do not have a seperate set of functions for + * registers instead of one, we do not have a separate set of functions for * each case. */ extern int s3c_gpio_setcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip, diff --git a/arch/arm/plat-s3c/include/plat/regs-usb-hsotg-phy.h b/arch/arm/plat-s3c/include/plat/regs-usb-hsotg-phy.h index 36a85f5000c8..a111ad871833 100644 --- a/arch/arm/plat-s3c/include/plat/regs-usb-hsotg-phy.h +++ b/arch/arm/plat-s3c/include/plat/regs-usb-hsotg-phy.h @@ -12,7 +12,7 @@ * published by the Free Software Foundation. */ -/* Note, this is a seperate header file as some of the clock framework +/* Note, this is a separate header file as some of the clock framework * needs to touch this if the clk_48m is used as the USB OHCI or other * peripheral source. */ diff --git a/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h b/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h index 33d421d78bad..d623235ae961 100644 --- a/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h +++ b/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h @@ -135,7 +135,7 @@ struct s3c_cpufreq_config { * @locktime_m: The lock-time in uS for the MPLL. * @locktime_u: The lock-time in uS for the UPLL. * @locttime_bits: The number of bits each LOCKTIME field. - * @need_pll: Set if this driver needs to change the PLL values to acheive + * @need_pll: Set if this driver needs to change the PLL values to achieve * any frequency changes. This is really only need by devices like the * S3C2410 where there is no or limited divider between the PLL and the * ARMCLK. diff --git a/arch/cris/arch-v10/lib/old_checksum.c b/arch/cris/arch-v10/lib/old_checksum.c index 1734b467efa6..8f79163f1394 100644 --- a/arch/cris/arch-v10/lib/old_checksum.c +++ b/arch/cris/arch-v10/lib/old_checksum.c @@ -77,7 +77,7 @@ __wsum csum_partial(const void *p, int len, __wsum __sum) sum += *buff++; if (endMarker > buff) - sum += *(const u8 *)buff; /* add extra byte seperately */ + sum += *(const u8 *)buff; /* add extra byte separately */ BITOFF; return (__force __wsum)sum; diff --git a/arch/cris/arch-v32/mm/tlb.c b/arch/cris/arch-v32/mm/tlb.c index 6779bcb28ab0..c030d020660a 100644 --- a/arch/cris/arch-v32/mm/tlb.c +++ b/arch/cris/arch-v32/mm/tlb.c @@ -189,7 +189,7 @@ switch_mm(struct mm_struct *prev, struct mm_struct *next, spin_unlock(&mmu_context_lock); /* - * Remember the pgd for the fault handlers. Keep a seperate + * Remember the pgd for the fault handlers. Keep a separate * copy of it because current and active_mm might be invalid * at points where * there's still a need to derefer the pgd. */ diff --git a/arch/h8300/include/asm/io.h b/arch/h8300/include/asm/io.h index 33e842f3284b..c1a8df22080f 100644 --- a/arch/h8300/include/asm/io.h +++ b/arch/h8300/include/asm/io.h @@ -25,7 +25,7 @@ * memory location directly. */ /* ++roman: The assignments to temp. vars avoid that gcc sometimes generates - * two accesses to memory, which may be undesireable for some devices. + * two accesses to memory, which may be undesirable for some devices. */ /* diff --git a/arch/ia64/sn/kernel/setup.c b/arch/ia64/sn/kernel/setup.c index ece1bf994499..c6c6d9381126 100644 --- a/arch/ia64/sn/kernel/setup.c +++ b/arch/ia64/sn/kernel/setup.c @@ -241,7 +241,7 @@ static void __cpuinit sn_check_for_wars(void) * Note: This stuff is duped here because Altix requires the PCDP to * locate a usable VGA device due to lack of proper ACPI support. Structures * could be used from drivers/firmware/pcdp.h, but it was decided that moving - * this file to a more public location just for Altix use was undesireable. + * this file to a more public location just for Altix use was undesirable. */ struct hcdp_uart_desc { diff --git a/arch/m68k/atari/atakeyb.c b/arch/m68k/atari/atakeyb.c index 4add96d13b19..5890897d28bf 100644 --- a/arch/m68k/atari/atakeyb.c +++ b/arch/m68k/atari/atakeyb.c @@ -121,7 +121,7 @@ KEYBOARD_STATE kb_state; * bytes have been lost and in which state of the packet structure we are now. * This usually causes keyboards bytes to be interpreted as mouse movements * and vice versa, which is very annoying. It seems better to throw away some - * bytes (that are usually mouse bytes) than to misinterpret them. Therefor I + * bytes (that are usually mouse bytes) than to misinterpret them. Therefore I * introduced the RESYNC state for IKBD data. In this state, the bytes up to * one that really looks like a key event (0x04..0xf2) or the start of a mouse * packet (0xf8..0xfb) are thrown away, but at most 2 bytes. This at least diff --git a/arch/m68k/include/asm/io_no.h b/arch/m68k/include/asm/io_no.h index 359065d5a9f2..6e2413e518cb 100644 --- a/arch/m68k/include/asm/io_no.h +++ b/arch/m68k/include/asm/io_no.h @@ -16,7 +16,7 @@ * memory location directly. */ /* ++roman: The assignments to temp. vars avoid that gcc sometimes generates - * two accesses to memory, which may be undesireable for some devices. + * two accesses to memory, which may be undesirable for some devices. */ /* diff --git a/arch/powerpc/boot/dts/kmeter1.dts b/arch/powerpc/boot/dts/kmeter1.dts index 65b8b4f27efe..d8b5d12fb663 100644 --- a/arch/powerpc/boot/dts/kmeter1.dts +++ b/arch/powerpc/boot/dts/kmeter1.dts @@ -490,7 +490,7 @@ compatible = "cfi-flash"; /* * The Intel P30 chip has 2 non-identical chips on - * one die, so we need to define 2 seperate regions + * one die, so we need to define 2 separate regions * that are scanned by physmap_of independantly. */ reg = <0 0x00000000 0x02000000 diff --git a/arch/s390/include/asm/cio.h b/arch/s390/include/asm/cio.h index e85679af54dd..e34347d567a6 100644 --- a/arch/s390/include/asm/cio.h +++ b/arch/s390/include/asm/cio.h @@ -20,7 +20,7 @@ /** * struct ccw1 - channel command word * @cmd_code: command code - * @flags: flags, like IDA adressing, etc. + * @flags: flags, like IDA addressing, etc. * @count: byte count * @cda: data address * diff --git a/arch/s390/kernel/sclp.S b/arch/s390/kernel/sclp.S index e27ca63076d1..27c1a2e236d1 100644 --- a/arch/s390/kernel/sclp.S +++ b/arch/s390/kernel/sclp.S @@ -221,7 +221,7 @@ _sclp_print: lh %r9,0(%r8) # update sccb length ar %r9,%r6 sth %r9,0(%r8) - ar %r7,%r6 # update current mto adress + ar %r7,%r6 # update current mto address ltr %r0,%r0 # more characters? jnz .LinitmtoS4 l %r2,.LwritedataS4-.LbaseS4(%r13)# write data diff --git a/arch/sparc/kernel/leon_kernel.c b/arch/sparc/kernel/leon_kernel.c index 87f1760c0aa2..554e0b80bcde 100644 --- a/arch/sparc/kernel/leon_kernel.c +++ b/arch/sparc/kernel/leon_kernel.c @@ -124,7 +124,7 @@ void __init leon_init_timers(irq_handler_t counter_fn) if (!(LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->config) & (1<<LEON3_GPTIMER_SEPIRQ))) { - prom_printf("irq timer not configured with seperate irqs \n"); + prom_printf("irq timer not configured with separate irqs \n"); BUG(); } diff --git a/arch/sparc/kernel/perf_event.c b/arch/sparc/kernel/perf_event.c index e856456ec02f..a565ee5146eb 100644 --- a/arch/sparc/kernel/perf_event.c +++ b/arch/sparc/kernel/perf_event.c @@ -1353,7 +1353,7 @@ static void perf_callchain_user_32(struct pt_regs *regs, } /* Like powerpc we can't get PMU interrupts within the PMU handler, - * so no need for seperate NMI and IRQ chains as on x86. + * so no need for separate NMI and IRQ chains as on x86. */ static DEFINE_PER_CPU(struct perf_callchain_entry, callchain); diff --git a/arch/x86/crypto/twofish-i586-asm_32.S b/arch/x86/crypto/twofish-i586-asm_32.S index 39b98ed2c1b9..575331cb2a8a 100644 --- a/arch/x86/crypto/twofish-i586-asm_32.S +++ b/arch/x86/crypto/twofish-i586-asm_32.S @@ -22,7 +22,7 @@ #include <asm/asm-offsets.h> -/* return adress at 0 */ +/* return address at 0 */ #define in_blk 12 /* input byte array address parameter*/ #define out_blk 8 /* output byte array address parameter*/ @@ -230,8 +230,8 @@ twofish_enc_blk: push %edi mov tfm + 16(%esp), %ebp /* abuse the base pointer: set new base bointer to the crypto tfm */ - add $crypto_tfm_ctx_offset, %ebp /* ctx adress */ - mov in_blk+16(%esp),%edi /* input adress in edi */ + add $crypto_tfm_ctx_offset, %ebp /* ctx address */ + mov in_blk+16(%esp),%edi /* input address in edi */ mov (%edi), %eax mov b_offset(%edi), %ebx @@ -286,8 +286,8 @@ twofish_dec_blk: mov tfm + 16(%esp), %ebp /* abuse the base pointer: set new base bointer to the crypto tfm */ - add $crypto_tfm_ctx_offset, %ebp /* ctx adress */ - mov in_blk+16(%esp),%edi /* input adress in edi */ + add $crypto_tfm_ctx_offset, %ebp /* ctx address */ + mov in_blk+16(%esp),%edi /* input address in edi */ mov (%edi), %eax mov b_offset(%edi), %ebx diff --git a/arch/x86/crypto/twofish-x86_64-asm_64.S b/arch/x86/crypto/twofish-x86_64-asm_64.S index 35974a586615..573aa102542e 100644 --- a/arch/x86/crypto/twofish-x86_64-asm_64.S +++ b/arch/x86/crypto/twofish-x86_64-asm_64.S @@ -221,11 +221,11 @@ twofish_enc_blk: pushq R1 - /* %rdi contains the crypto tfm adress */ - /* %rsi contains the output adress */ - /* %rdx contains the input adress */ - add $crypto_tfm_ctx_offset, %rdi /* set ctx adress */ - /* ctx adress is moved to free one non-rex register + /* %rdi contains the crypto tfm address */ + /* %rsi contains the output address */ + /* %rdx contains the input address */ + add $crypto_tfm_ctx_offset, %rdi /* set ctx address */ + /* ctx address is moved to free one non-rex register as target for the 8bit high operations */ mov %rdi, %r11 @@ -274,11 +274,11 @@ twofish_enc_blk: twofish_dec_blk: pushq R1 - /* %rdi contains the crypto tfm adress */ - /* %rsi contains the output adress */ - /* %rdx contains the input adress */ - add $crypto_tfm_ctx_offset, %rdi /* set ctx adress */ - /* ctx adress is moved to free one non-rex register + /* %rdi contains the crypto tfm address */ + /* %rsi contains the output address */ + /* %rdx contains the input address */ + add $crypto_tfm_ctx_offset, %rdi /* set ctx address */ + /* ctx address is moved to free one non-rex register as target for the 8bit high operations */ mov %rdi, %r11 diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S index 2d8b5035371c..3d1e6f16b7a6 100644 --- a/arch/x86/kernel/head_64.S +++ b/arch/x86/kernel/head_64.S @@ -27,7 +27,7 @@ #define GET_CR2_INTO_RCX movq %cr2, %rcx #endif -/* we are not able to switch in one step to the final KERNEL ADRESS SPACE +/* we are not able to switch in one step to the final KERNEL ADDRESS SPACE * because we need identity-mapped pages. * */ diff --git a/arch/x86/kernel/pci-calgary_64.c b/arch/x86/kernel/pci-calgary_64.c index 2bbde6078143..fb99f7edb341 100644 --- a/arch/x86/kernel/pci-calgary_64.c +++ b/arch/x86/kernel/pci-calgary_64.c @@ -1309,7 +1309,7 @@ static void calgary_init_bitmap_from_tce_table(struct iommu_table *tbl) /* * get_tce_space_from_tar(): * Function for kdump case. Get the tce tables from first kernel - * by reading the contents of the base adress register of calgary iommu + * by reading the contents of the base address register of calgary iommu */ static void __init get_tce_space_from_tar(void) { diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 597683aa5ba0..dec8f68e3eda 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -50,7 +50,7 @@ u64 native_sched_clock(void) * unstable. We do this because unlike Time Of Day, * the scheduler clock tolerates small errors and it's * very important for it to be as fast as the platform - * can achive it. ) + * can achieve it. ) */ if (unlikely(tsc_disabled)) { /* No locking but a rare wrong value is not a big deal: */ diff --git a/arch/xtensa/kernel/entry.S b/arch/xtensa/kernel/entry.S index 80d24c485fd3..77fc9f6dc016 100644 --- a/arch/xtensa/kernel/entry.S +++ b/arch/xtensa/kernel/entry.S @@ -104,7 +104,7 @@ * excsave has been restored, and * stack pointer (a1) has been set. * - * Note: _user_exception might be at an odd adress. Don't use call0..call12 + * Note: _user_exception might be at an odd address. Don't use call0..call12 */ ENTRY(user_exception) @@ -244,7 +244,7 @@ _user_exception: * excsave has been restored, and * stack pointer (a1) has been set. * - * Note: _kernel_exception might be at an odd adress. Don't use call0..call12 + * Note: _kernel_exception might be at an odd address. Don't use call0..call12 */ ENTRY(kernel_exception) |