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authorJames Hogan <james.hogan@imgtec.com>2013-04-22 16:46:43 +0100
committerJames Hogan <james.hogan@imgtec.com>2013-06-27 13:49:56 +0100
commit5a88130a2aac2bf02d3c50abc7e65ebac11a4fd4 (patch)
treea61eb3680f596beb0e227665d97a467e305f9376 /arch
parent9630fa9fe6fec46b498d0784f00f8ef2bbd5b6ec (diff)
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metag: tz1090: select and instantiate pinctrl-tz1090-pdc
Select PINCTRL_TZ1090_PDC from SOC_TZ1090 to enable the PDC pin controller driver once it is merged, and instantiate it from tz1090.dtsi. Signed-off-by: James Hogan <james.hogan@imgtec.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Grant Likely <grant.likely@linaro.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/metag/Kconfig.soc1
-rw-r--r--arch/metag/boot/dts/tz1090.dtsi6
2 files changed, 7 insertions, 0 deletions
diff --git a/arch/metag/Kconfig.soc b/arch/metag/Kconfig.soc
index 6b11ca363ceb..2a3c860c7525 100644
--- a/arch/metag/Kconfig.soc
+++ b/arch/metag/Kconfig.soc
@@ -21,6 +21,7 @@ config SOC_TZ1090
select METAG_SMP_WRITE_REORDERING
select PINCTRL
select PINCTRL_TZ1090
+ select PINCTRL_TZ1090_PDC
help
This is a Toumaz Technology Xenif TZ1090 (A.K.A. Comet) SoC containing
a 2-threaded HTP.
diff --git a/arch/metag/boot/dts/tz1090.dtsi b/arch/metag/boot/dts/tz1090.dtsi
index 697f3840e4d8..853744652b93 100644
--- a/arch/metag/boot/dts/tz1090.dtsi
+++ b/arch/metag/boot/dts/tz1090.dtsi
@@ -31,5 +31,11 @@
compatible = "img,tz1090-pinctrl";
reg = <0x02005800 0xe4>;
};
+
+ pdc_pinctrl: pinctrl@02006500 {
+ #gpio-range-cells = <3>;
+ compatible = "img,tz1090-pdc-pinctrl";
+ reg = <0x02006500 0x100>;
+ };
};
};