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authorAndrew Bresticker <abrestic@chromium.org>2014-09-18 14:47:23 -0700
committerRalf Baechle <ralf@linux-mips.org>2014-11-24 07:44:55 +0100
commitc49581a4dfaade3a483f3db85581a2cdb6bb85a0 (patch)
tree356b4d73d54b6bb55c01034facbff55628e461d0 /arch
parent14d160ab72aaa784219f733fbac6032d3494fc73 (diff)
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irqchip: mips-gic: Use IRQ domains
Use a simple IRQ domain for the MIPS GIC. Remove the gic_platform_init callback as it's no longer necessary for it to set the irqchip. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Acked-by: Jason Cooper <jason@lakedaemon.net> Reviewed-by: Qais Yousef <qais.yousef@imgtec.com> Tested-by: Qais Yousef <qais.yousef@imgtec.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jeffrey Deans <jeffrey.deans@imgtec.com> Cc: Markos Chandras <markos.chandras@imgtec.com> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Jonas Gorski <jogo@openwrt.org> Cc: John Crispin <blogic@openwrt.org> Cc: David Daney <ddaney.cavm@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/7811/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/include/asm/gic.h1
-rw-r--r--arch/mips/mti-malta/malta-int.c8
-rw-r--r--arch/mips/mti-sead3/sead3-int.c15
3 files changed, 0 insertions, 24 deletions
diff --git a/arch/mips/include/asm/gic.h b/arch/mips/include/asm/gic.h
index 662b56719263..efcf4dec1229 100644
--- a/arch/mips/include/asm/gic.h
+++ b/arch/mips/include/asm/gic.h
@@ -385,5 +385,4 @@ extern void gic_bind_eic_interrupt(int irq, int set);
extern unsigned int gic_get_timer_pending(void);
extern void gic_get_int_mask(unsigned long *dst, const unsigned long *src);
extern unsigned int gic_get_int(void);
-extern void gic_platform_init(int irqs, struct irq_chip *irq_controller);
#endif /* _ASM_GICREGS_H */
diff --git a/arch/mips/mti-malta/malta-int.c b/arch/mips/mti-malta/malta-int.c
index b60adfd2bae6..e56563c6f89e 100644
--- a/arch/mips/mti-malta/malta-int.c
+++ b/arch/mips/mti-malta/malta-int.c
@@ -714,11 +714,3 @@ int malta_be_handler(struct pt_regs *regs, int is_fixup)
return retval;
}
-
-void __init gic_platform_init(int irqs, struct irq_chip *irq_controller)
-{
- int i;
-
- for (i = gic_irq_base; i < (gic_irq_base + irqs); i++)
- irq_set_chip(i, irq_controller);
-}
diff --git a/arch/mips/mti-sead3/sead3-int.c b/arch/mips/mti-sead3/sead3-int.c
index 03f9865e0464..8f3634281ed9 100644
--- a/arch/mips/mti-sead3/sead3-int.c
+++ b/arch/mips/mti-sead3/sead3-int.c
@@ -85,18 +85,3 @@ void __init arch_init_irq(void)
ARRAY_SIZE(gic_intr_map), MIPS_GIC_IRQ_BASE);
}
-void __init gic_platform_init(int irqs, struct irq_chip *irq_controller)
-{
- int i;
-
- /*
- * For non-EIC mode, we want to setup the GIC in pass-through
- * mode, as if the GIC didn't exist. Do not map any interrupts
- * for an external interrupt controller.
- */
- if (!cpu_has_veic)
- return;
-
- for (i = gic_irq_base; i < (gic_irq_base + irqs); i++)
- irq_set_chip_and_handler(i, irq_controller, handle_percpu_irq);
-}