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author | Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com> | 2018-08-22 22:46:04 +0530 |
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committer | Michael Ellerman <mpe@ellerman.id.au> | 2018-08-23 12:16:01 +1000 |
commit | bd0dbb73e01306a1060e56f81e5fe287be936477 (patch) | |
tree | c9fca4a21b66504708a415be3f63b5a4d03573a6 /arch | |
parent | 810e9f86f36f59f1d6f6710220c49afe0c705f38 (diff) | |
download | linux-stable-bd0dbb73e01306a1060e56f81e5fe287be936477.tar.gz linux-stable-bd0dbb73e01306a1060e56f81e5fe287be936477.tar.bz2 linux-stable-bd0dbb73e01306a1060e56f81e5fe287be936477.zip |
powerpc/mm/books3s: Add new pte bit to mark pte temporarily invalid.
When splitting a huge pmd pte, we need to mark the pmd entry invalid. We
can do that by clearing _PAGE_PRESENT bit. But then that will be taken as a
swap pte. In order to differentiate between the two use a software pte bit
when invalidating.
For regular pte, due to bd5050e38aec ("powerpc/mm/radix: Change pte relax
sequence to handle nest MMU hang") we need to mark the pte entry invalid when
relaxing access permission. Instead of marking pte_none which can result in
different page table walk routines possibly skipping this pte entry, invalidate
it but still keep it marked present.
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/powerpc/include/asm/book3s/64/pgtable.h | 18 |
1 files changed, 17 insertions, 1 deletions
diff --git a/arch/powerpc/include/asm/book3s/64/pgtable.h b/arch/powerpc/include/asm/book3s/64/pgtable.h index 676118743a06..13a688fc8cd0 100644 --- a/arch/powerpc/include/asm/book3s/64/pgtable.h +++ b/arch/powerpc/include/asm/book3s/64/pgtable.h @@ -44,6 +44,16 @@ #define _PAGE_PTE 0x4000000000000000UL /* distinguishes PTEs from pointers */ #define _PAGE_PRESENT 0x8000000000000000UL /* pte contains a translation */ +/* + * We need to mark a pmd pte invalid while splitting. We can do that by clearing + * the _PAGE_PRESENT bit. But then that will be taken as a swap pte. In order to + * differentiate between two use a SW field when invalidating. + * + * We do that temporary invalidate for regular pte entry in ptep_set_access_flags + * + * This is used only when _PAGE_PRESENT is cleared. + */ +#define _PAGE_INVALID _RPAGE_SW0 /* * Top and bottom bits of RPN which can be used by hash @@ -568,7 +578,13 @@ static inline pte_t pte_clear_savedwrite(pte_t pte) static inline int pte_present(pte_t pte) { - return !!(pte_raw(pte) & cpu_to_be64(_PAGE_PRESENT)); + /* + * A pte is considerent present if _PAGE_PRESENT is set. + * We also need to consider the pte present which is marked + * invalid during ptep_set_access_flags. Hence we look for _PAGE_INVALID + * if we find _PAGE_PRESENT cleared. + */ + return !!(pte_raw(pte) & cpu_to_be64(_PAGE_PRESENT | _PAGE_INVALID)); } #ifdef CONFIG_PPC_MEM_KEYS |