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| author | Andrew Bresticker <abrestic@chromium.org> | 2014-10-20 12:03:51 -0700 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2014-11-24 07:44:58 +0100 |
| commit | 609ead041b4c607163e7240a8674b608df31d2a8 (patch) | |
| tree | 2332acbf3831caf84686f25b77563c20a7b5a1de /arch | |
| parent | 327b8c89d4aec9871626415868c8312b9722f2b8 (diff) | |
| download | linux-stable-609ead041b4c607163e7240a8674b608df31d2a8.tar.gz linux-stable-609ead041b4c607163e7240a8674b608df31d2a8.tar.bz2 linux-stable-609ead041b4c607163e7240a8674b608df31d2a8.zip | |
MIPS: Malta: Stop using GIC REG macros
Stop using the REG macros from gic.h and instead use proper iomem
accessors.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Qais Yousef <qais.yousef@imgtec.com>
Cc: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8126/
Patchwork: https://patchwork.linux-mips.org/patch/8227/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/mips/mti-malta/malta-int.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/arch/mips/mti-malta/malta-int.c b/arch/mips/mti-malta/malta-int.c index bcab0b197e9f..a058e0ba2a26 100644 --- a/arch/mips/mti-malta/malta-int.c +++ b/arch/mips/mti-malta/malta-int.c @@ -37,7 +37,7 @@ #include <asm/setup.h> #include <asm/rtlx.h> -static unsigned long _msc01_biu_base; +static void __iomem *_msc01_biu_base; static DEFINE_RAW_SPINLOCK(mips_irq_lock); @@ -293,12 +293,12 @@ void __init arch_init_irq(void) gic_present = 1; } else { if (mips_revision_sconid == MIPS_REVISION_SCON_ROCIT) { - _msc01_biu_base = (unsigned long) - ioremap_nocache(MSC01_BIU_REG_BASE, + _msc01_biu_base = ioremap_nocache(MSC01_BIU_REG_BASE, MSC01_BIU_ADDRSPACE_SZ); - gic_present = (REG(_msc01_biu_base, MSC01_SC_CFG) & - MSC01_SC_CFG_GICPRES_MSK) >> - MSC01_SC_CFG_GICPRES_SHF; + gic_present = + (__raw_readl(_msc01_biu_base + MSC01_SC_CFG_OFS) & + MSC01_SC_CFG_GICPRES_MSK) >> + MSC01_SC_CFG_GICPRES_SHF; } } if (gic_present) @@ -336,9 +336,9 @@ void __init arch_init_irq(void) MIPS_GIC_IRQ_BASE); if (!mips_cm_present()) { /* Enable the GIC */ - i = REG(_msc01_biu_base, MSC01_SC_CFG); - REG(_msc01_biu_base, MSC01_SC_CFG) = - (i | (0x1 << MSC01_SC_CFG_GICENA_SHF)); + i = __raw_readl(_msc01_biu_base + MSC01_SC_CFG_OFS); + __raw_writel(i | (0x1 << MSC01_SC_CFG_GICENA_SHF), + _msc01_biu_base + MSC01_SC_CFG_OFS); pr_debug("GIC Enabled\n"); } i8259_irq = MIPS_GIC_IRQ_BASE + GIC_INT_I8259A; |