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| author | Santosh Shilimkar <santosh.shilimkar@ti.com> | 2010-07-11 14:13:26 +0530 |
|---|---|---|
| committer | Santosh Shilimkar <santosh.shilimkar@ti.com> | 2010-10-26 11:40:02 +0530 |
| commit | 7db27e864abe0110cec5087b77de777455581e8f (patch) | |
| tree | 35af0f8801c1c785ef560edf4e076f4a2a4c095b /arch | |
| parent | 4e803c40b33822b52389952040f490e79973e94a (diff) | |
| download | linux-stable-7db27e864abe0110cec5087b77de777455581e8f.tar.gz linux-stable-7db27e864abe0110cec5087b77de777455581e8f.tar.bz2 linux-stable-7db27e864abe0110cec5087b77de777455581e8f.zip | |
ARM: l2x0: Fix coding-style in the cache-l2x0.h
Replace tab with space after #define to be consisten with other
define in the file. Also move the bit mask below the register offsets.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Linus Walleij <linus.walleij@stericsson.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/include/asm/hardware/cache-l2x0.h | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/arch/arm/include/asm/hardware/cache-l2x0.h b/arch/arm/include/asm/hardware/cache-l2x0.h index 6bcba48800fe..d833355569cb 100644 --- a/arch/arm/include/asm/hardware/cache-l2x0.h +++ b/arch/arm/include/asm/hardware/cache-l2x0.h @@ -21,9 +21,6 @@ #define __ASM_ARM_HARDWARE_L2X0_H #define L2X0_CACHE_ID 0x000 -#define L2X0_CACHE_ID_PART_MASK (0xf << 6) -#define L2X0_CACHE_ID_PART_L210 (1 << 6) -#define L2X0_CACHE_ID_PART_L310 (3 << 6) #define L2X0_CACHE_TYPE 0x004 #define L2X0_CTRL 0x100 #define L2X0_AUX_CTRL 0x104 @@ -54,6 +51,11 @@ #define L2X0_LINE_TAG 0xF30 #define L2X0_DEBUG_CTRL 0xF40 +/* Registers shifts and masks */ +#define L2X0_CACHE_ID_PART_MASK (0xf << 6) +#define L2X0_CACHE_ID_PART_L210 (1 << 6) +#define L2X0_CACHE_ID_PART_L310 (3 << 6) + #ifndef __ASSEMBLY__ extern void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask); #endif |