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| author | Jon Medhurst <tixy@yxit.co.uk> | 2011-06-09 17:35:36 +0100 |
|---|---|---|
| committer | Tixy <tixy@medhuaa1.miniserver.com> | 2011-07-13 17:32:48 +0000 |
| commit | 9f596e51261f96d602aa4eaf6db7f12ce53260d6 (patch) | |
| tree | b10f381513b0c5d1c4f7269adfa3de4d3d56447b /arch | |
| parent | 7be7ee2d295f6a069e1e92db95bf92eea2a173cf (diff) | |
| download | linux-stable-9f596e51261f96d602aa4eaf6db7f12ce53260d6.tar.gz linux-stable-9f596e51261f96d602aa4eaf6db7f12ce53260d6.tar.bz2 linux-stable-9f596e51261f96d602aa4eaf6db7f12ce53260d6.zip | |
ARM: kprobes: Add emulate_rd12rn16rm0rs8_rwflags()
This is the emulation function for the instruction format used by the
ARM data-processing instructions.
Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/kernel/kprobes-arm.c | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/arch/arm/kernel/kprobes-arm.c b/arch/arm/kernel/kprobes-arm.c index 80a941100f8c..6e38bd4f7efd 100644 --- a/arch/arm/kernel/kprobes-arm.c +++ b/arch/arm/kernel/kprobes-arm.c @@ -893,6 +893,41 @@ prep_emulate_rdhi16rdlo12rs8rm0_wflags(kprobe_opcode_t insn, return INSN_GOOD; } +static void __kprobes +emulate_rd12rn16rm0rs8_rwflags(struct kprobe *p, struct pt_regs *regs) +{ + kprobe_opcode_t insn = p->opcode; + unsigned long pc = (unsigned long)p->addr + 8; + int rd = (insn >> 12) & 0xf; + int rn = (insn >> 16) & 0xf; + int rm = insn & 0xf; + int rs = (insn >> 8) & 0xf; + + register unsigned long rdv asm("r0") = regs->uregs[rd]; + register unsigned long rnv asm("r2") = (rn == 15) ? pc + : regs->uregs[rn]; + register unsigned long rmv asm("r3") = (rm == 15) ? pc + : regs->uregs[rm]; + register unsigned long rsv asm("r1") = regs->uregs[rs]; + unsigned long cpsr = regs->ARM_cpsr; + + __asm__ __volatile__ ( + "msr cpsr_fs, %[cpsr] \n\t" + BLX("%[fn]") + "mrs %[cpsr], cpsr \n\t" + : "=r" (rdv), [cpsr] "=r" (cpsr) + : "0" (rdv), "r" (rnv), "r" (rmv), "r" (rsv), + "1" (cpsr), [fn] "r" (p->ainsn.insn_fn) + : "lr", "memory", "cc" + ); + + if (rd == 15) + alu_write_pc(rdv, regs); + else + regs->uregs[rd] = rdv; + regs->ARM_cpsr = (regs->ARM_cpsr & ~APSR_MASK) | (cpsr & APSR_MASK); +} + /* * For the instruction masking and comparisons in all the "space_*" * functions below, Do _not_ rearrange the order of tests unless |