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authorBalaji T K <balajitk@ti.com>2011-10-03 17:52:51 +0530
committerTony Lindgren <tony@atomide.com>2011-11-04 17:41:07 -0700
commitc862dd706759c48a8a45af140330544724f170f9 (patch)
tree7d1536d717f488dbc4512f1de76497acb052bdaa /arch
parentff2beb1d9f2fecc3f5c1d67bfec1183a5a476586 (diff)
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ARM: OMAP4: hsmmc: configure SDMMC1_DR0 properly
Fix the typo, instead it should be SDMMC1 USBC1 is not related to MMC1 I/Os Signed-off-by: Balaji T K <balajitk@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-omap2/hsmmc.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index d663649f6923..f4a1020559a7 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -479,7 +479,7 @@ void __init omap2_hsmmc_init(struct omap2_hsmmc_info *controllers)
OMAP4_SDMMC1_PUSTRENGTH_GRP1_MASK);
reg &= ~(OMAP4_SDMMC1_PUSTRENGTH_GRP2_MASK |
OMAP4_SDMMC1_PUSTRENGTH_GRP3_MASK);
- reg |= (OMAP4_USBC1_DR0_SPEEDCTRL_MASK|
+ reg |= (OMAP4_SDMMC1_DR0_SPEEDCTRL_MASK |
OMAP4_SDMMC1_DR1_SPEEDCTRL_MASK |
OMAP4_SDMMC1_DR2_SPEEDCTRL_MASK);
omap4_ctrl_pad_writel(reg, control_mmc1);