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| author | Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> | 2021-10-06 01:55:22 +0530 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2021-11-02 17:39:22 +0100 |
| commit | 4b6d2902afbc2b8d5d2b9f62dd9f8a11ccfb4abd (patch) | |
| tree | 2f1252ee306740b72df036d8bbd3dde6c3670051 /arch | |
| parent | 4e03c2eb34dd91caef02621aea85ca99fe06a4a0 (diff) | |
| download | linux-stable-4b6d2902afbc2b8d5d2b9f62dd9f8a11ccfb4abd.tar.gz linux-stable-4b6d2902afbc2b8d5d2b9f62dd9f8a11ccfb4abd.tar.bz2 linux-stable-4b6d2902afbc2b8d5d2b9f62dd9f8a11ccfb4abd.zip | |
powerpc/bpf: Fix BPF_MOD when imm == 1
commit 8bbc9d822421d9ac8ff9ed26a3713c9afc69d6c8 upstream.
Only ignore the operation if dividing by 1.
Fixes: 156d0e290e969c ("powerpc/ebpf/jit: Implement JIT compiler for extended BPF")
Signed-off-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
Tested-by: Johan Almbladh <johan.almbladh@anyfinetworks.com>
Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Acked-by: Song Liu <songliubraving@fb.com>
Acked-by: Johan Almbladh <johan.almbladh@anyfinetworks.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/c674ca18c3046885602caebb326213731c675d06.1633464148.git.naveen.n.rao@linux.vnet.ibm.com
[cascardo: use PPC_LI instead of EMIT(PPC_RAW_LI)]
Signed-off-by: Thadeu Lima de Souza Cascardo <cascardo@canonical.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/powerpc/net/bpf_jit_comp64.c | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/arch/powerpc/net/bpf_jit_comp64.c b/arch/powerpc/net/bpf_jit_comp64.c index 888ee95340da..e08e55cd98e6 100644 --- a/arch/powerpc/net/bpf_jit_comp64.c +++ b/arch/powerpc/net/bpf_jit_comp64.c @@ -430,8 +430,14 @@ static int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, case BPF_ALU64 | BPF_DIV | BPF_K: /* dst /= imm */ if (imm == 0) return -EINVAL; - else if (imm == 1) - goto bpf_alu32_trunc; + if (imm == 1) { + if (BPF_OP(code) == BPF_DIV) { + goto bpf_alu32_trunc; + } else { + PPC_LI(dst_reg, 0); + break; + } + } PPC_LI32(b2p[TMP_REG_1], imm); switch (BPF_CLASS(code)) { |