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authorRalf Baechle <ralf@linux-mips.org>2013-01-22 18:03:45 +0100
committerRalf Baechle <ralf@linux-mips.org>2013-01-22 18:07:46 +0100
commit757be67f565b4336f0d847f3ca9332e050c9ba83 (patch)
treeecd6403707febbb2c4e954d2e12f978b4d94ab5d /arch
parent4ea494b528ac1b9df9f0c77ba49e3e8ee108d9ec (diff)
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MIPS: Octeon: Fix warning.
Cong Ding <dinggnu@gmail.com> reports correctly that the variable dummy is being used without initialization. That said, I can't reproduce this warning with GCC 4.7.1. However, since the variable dummy servces no real purpose, I'm going for a different fix. This fix includes https://patchwork.linux-mips.org/patch/4801/ plus Geert's suggestion to use ACCESS_ONCE(). Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/cavium-octeon/executive/cvmx-l2c.c9
1 files changed, 5 insertions, 4 deletions
diff --git a/arch/mips/cavium-octeon/executive/cvmx-l2c.c b/arch/mips/cavium-octeon/executive/cvmx-l2c.c
index 9f883bf76953..33b72144db31 100644
--- a/arch/mips/cavium-octeon/executive/cvmx-l2c.c
+++ b/arch/mips/cavium-octeon/executive/cvmx-l2c.c
@@ -30,6 +30,7 @@
* measurement, and debugging facilities.
*/
+#include <linux/compiler.h>
#include <linux/irqflags.h>
#include <asm/octeon/cvmx.h>
#include <asm/octeon/cvmx-l2c.h>
@@ -285,22 +286,22 @@ uint64_t cvmx_l2c_read_perf(uint32_t counter)
*/
static void fault_in(uint64_t addr, int len)
{
- volatile char *ptr;
- volatile char dummy;
+ char *ptr;
+
/*
* Adjust addr and length so we get all cache lines even for
* small ranges spanning two cache lines.
*/
len += addr & CVMX_CACHE_LINE_MASK;
addr &= ~CVMX_CACHE_LINE_MASK;
- ptr = (volatile char *)cvmx_phys_to_ptr(addr);
+ ptr = cvmx_phys_to_ptr(addr);
/*
* Invalidate L1 cache to make sure all loads result in data
* being in L2.
*/
CVMX_DCACHE_INVALIDATE;
while (len > 0) {
- dummy += *ptr;
+ ACCESS_ONCE(*ptr);
len -= CVMX_CACHE_LINE_SIZE;
ptr += CVMX_CACHE_LINE_SIZE;
}