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authorAndrew-CT Chen <andrew-ct.chen@mediatek.com>2016-05-03 07:11:22 -0300
committerMauro Carvalho Chehab <mchehab@s-opensource.com>2016-07-08 14:05:20 -0300
commit404b28199378a4ee6033e8c40399d82d1f3bd3bc (patch)
tree22b190820f340b12d0ffb7bd9fb156c033546d34 /arch
parent3003a180ef6b9462f3cccc2a89884ef2332d2a1c (diff)
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[media] arm64: dts: mediatek: Add node for Mediatek Video Processor Unit
Add VPU drivers for MT8173 Signed-off-by: Andrew-CT Chen <andrew-ct.chen@mediatek.com> Signed-off-by: Tiffany Lin <tiffany.lin@mediatek.com> Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm64/boot/dts/mediatek/mt8173.dtsi23
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 05f89c4a5413..72a230f81042 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -168,6 +168,18 @@
};
};
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ vpu_dma_reserved: vpu_dma_mem_region {
+ compatible = "shared-dma-pool";
+ reg = <0 0xb7000000 0 0x500000>;
+ alignment = <0x1000>;
+ no-map;
+ };
+ };
+
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <&gic>;
@@ -312,6 +324,17 @@
clock-names = "spi", "wrap";
};
+ vpu: vpu@10020000 {
+ compatible = "mediatek,mt8173-vpu";
+ reg = <0 0x10020000 0 0x30000>,
+ <0 0x10050000 0 0x100>;
+ reg-names = "tcm", "cfg_reg";
+ interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&topckgen CLK_TOP_SCP_SEL>;
+ clock-names = "main";
+ memory-region = <&vpu_dma_reserved>;
+ };
+
sysirq: intpol-controller@10200620 {
compatible = "mediatek,mt8173-sysirq",
"mediatek,mt6577-sysirq";