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author | Sergio Paracuellos <sergio.paracuellos@gmail.com> | 2020-03-12 12:29:15 +0100 |
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committer | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2020-03-23 15:44:04 +0100 |
commit | 71b9b5e0130d04874942c0b91205bb79b7ffe750 (patch) | |
tree | 8183de4f5782f74b8bfe991f9c979ed57a205d99 /arch | |
parent | a67bac098d9e90dc5c405470ea8f2b9e90c6a04b (diff) | |
download | linux-stable-71b9b5e0130d04874942c0b91205bb79b7ffe750.tar.gz linux-stable-71b9b5e0130d04874942c0b91205bb79b7ffe750.tar.bz2 linux-stable-71b9b5e0130d04874942c0b91205bb79b7ffe750.zip |
MIPS: ralink: mt7621: introduce 'soc_device' initialization
mt7621 SoC has its own 'ralink_soc_info' structure with some
information about the soc itself. Pcie controller and pcie phy
drivers for this soc which are still in staging git tree make uses
of 'soc_device_attribute' looking for revision 'E2' in order to
know if reset lines are or not inverted. This way of doing things
seems to be necessary in order to make things clean and properly.
Hence, introduce this 'soc_device' to be able to properly use those
attributes in drivers. Also set 'data' pointer points to the struct
'ralink_soc_info' to be able to export also current soc information
using this mechanism.
Cc: Paul Burton <paul.burton@mips.com>
Cc: ralf@linux-mips.org
Cc: jhogan@kernel.org
Cc: john@phrozen.org
Cc: NeilBrown <neil@brown.name>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: linux-mips@vger.kernel.org
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/mips/ralink/mt7621.c | 32 |
1 files changed, 31 insertions, 1 deletions
diff --git a/arch/mips/ralink/mt7621.c b/arch/mips/ralink/mt7621.c index 9415be0d57b8..905460aeeb1f 100644 --- a/arch/mips/ralink/mt7621.c +++ b/arch/mips/ralink/mt7621.c @@ -7,6 +7,8 @@ #include <linux/kernel.h> #include <linux/init.h> +#include <linux/slab.h> +#include <linux/sys_soc.h> #include <asm/mipsregs.h> #include <asm/smp-ops.h> @@ -160,6 +162,33 @@ void __init ralink_of_remap(void) panic("Failed to remap core resources"); } +static void soc_dev_init(struct ralink_soc_info *soc_info, u32 rev) +{ + struct soc_device *soc_dev; + struct soc_device_attribute *soc_dev_attr; + + soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL); + if (!soc_dev_attr) + return; + + soc_dev_attr->soc_id = "mt7621"; + soc_dev_attr->family = "Ralink"; + + if (((rev >> CHIP_REV_VER_SHIFT) & CHIP_REV_VER_MASK) == 1 && + (rev & CHIP_REV_ECO_MASK) == 1) + soc_dev_attr->revision = "E2"; + else + soc_dev_attr->revision = "E1"; + + soc_dev_attr->data = soc_info; + + soc_dev = soc_device_register(soc_dev_attr); + if (IS_ERR(soc_dev)) { + kfree(soc_dev_attr); + return; + } +} + void prom_soc_init(struct ralink_soc_info *soc_info) { void __iomem *sysc = (void __iomem *) KSEG1ADDR(MT7621_SYSC_BASE); @@ -214,11 +243,12 @@ void prom_soc_init(struct ralink_soc_info *soc_info) rt2880_pinmux_data = mt7621_pinmux_data; - if (!register_cps_smp_ops()) return; if (!register_cmp_smp_ops()) return; if (!register_vsmp_smp_ops()) return; + + soc_dev_init(soc_info, rev); } |