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| author | Gregory CLEMENT <gregory.clement@free-electrons.com> | 2013-01-25 18:32:41 +0100 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2013-02-28 18:57:07 +0100 |
| commit | 3a6f08a3708f6faf6aba4abbdeaa9da29393f696 (patch) | |
| tree | b6f4d2624eb4d4004682a426df87d942c6ced183 /arch | |
| parent | 9b75ac0cbf11199c4d125e68c3b86ae7d0ee941f (diff) | |
| download | linux-stable-3a6f08a3708f6faf6aba4abbdeaa9da29393f696.tar.gz linux-stable-3a6f08a3708f6faf6aba4abbdeaa9da29393f696.tar.bz2 linux-stable-3a6f08a3708f6faf6aba4abbdeaa9da29393f696.zip | |
arm: mvebu: Add support for local interrupt
MPIC allows the use of private interrupt for each CPUs. The 28th first
interrupts are per-cpu. This patch adds support to use them.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-mvebu/irq-armada-370-xp.c | 15 |
1 files changed, 11 insertions, 4 deletions
diff --git a/arch/arm/mach-mvebu/irq-armada-370-xp.c b/arch/arm/mach-mvebu/irq-armada-370-xp.c index f99a4a2a250d..274ff58271de 100644 --- a/arch/arm/mach-mvebu/irq-armada-370-xp.c +++ b/arch/arm/mach-mvebu/irq-armada-370-xp.c @@ -145,10 +145,17 @@ static int armada_370_xp_mpic_irq_map(struct irq_domain *h, { armada_370_xp_irq_mask(irq_get_irq_data(virq)); writel(hw, main_int_base + ARMADA_370_XP_INT_SET_ENABLE_OFFS); - - irq_set_chip_and_handler(virq, &armada_370_xp_irq_chip, - handle_level_irq); irq_set_status_flags(virq, IRQ_LEVEL); + + if (hw < ARMADA_370_XP_MAX_PER_CPU_IRQS) { + irq_set_percpu_devid(virq); + irq_set_chip_and_handler(virq, &armada_370_xp_irq_chip, + handle_percpu_devid_irq); + + } else { + irq_set_chip_and_handler(virq, &armada_370_xp_irq_chip, + handle_level_irq); + } set_irq_flags(virq, IRQF_VALID | IRQF_PROBE); return 0; @@ -245,7 +252,7 @@ asmlinkage void __exception_irq_entry armada_370_xp_handle_irq(struct pt_regs if (irqnr > 1022) break; - if (irqnr >= 8) { + if (irqnr > 0) { irqnr = irq_find_mapping(armada_370_xp_mpic_domain, irqnr); handle_IRQ(irqnr, regs); |