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authorCao jin <caoj.fnst@cn.fujitsu.com>2019-07-19 16:16:35 +0800
committerThomas Gleixner <tglx@linutronix.de>2019-07-22 10:54:27 +0200
commit385065734cd417b9d7739b2ebb62c960aeb3ccb5 (patch)
tree5672b7280f6f407b102f96495f365983c1d963ee /arch
parentd02f1aa39189e0619c3525d5cd03254e61bf606a (diff)
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x86/irq/64: Update stale comment
Commit e6401c130931 ("x86/irq/64: Split the IRQ stack into its own pages") missed to update one piece of comment as it did to its peer in Xen, which will confuse people who still need to read comment. Signed-off-by: Cao jin <caoj.fnst@cn.fujitsu.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/r/20190719081635.26528-1-caoj.fnst@cn.fujitsu.com
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/kernel/head_64.S8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S
index a6342c899be5..f3d3e9646a99 100644
--- a/arch/x86/kernel/head_64.S
+++ b/arch/x86/kernel/head_64.S
@@ -193,10 +193,10 @@ ENTRY(secondary_startup_64)
/* Set up %gs.
*
- * The base of %gs always points to the bottom of the irqstack
- * union. If the stack protector canary is enabled, it is
- * located at %gs:40. Note that, on SMP, the boot cpu uses
- * init data section till per cpu areas are set up.
+ * The base of %gs always points to fixed_percpu_data. If the
+ * stack protector canary is enabled, it is located at %gs:40.
+ * Note that, on SMP, the boot cpu uses init data section until
+ * the per cpu areas are set up.
*/
movl $MSR_GS_BASE,%ecx
movl initial_gs(%rip),%eax