diff options
author | Arnd Bergmann <arnd@arndb.de> | 2019-09-05 17:50:03 +0200 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2019-09-05 17:50:04 +0200 |
commit | 48f3a83283ea7bac9d7fa0c6f84ae64388707df0 (patch) | |
tree | 21bb035620060edfd1cec89cc2186831e2028891 /arch | |
parent | 72146720dd640081532649d52208492ebe6519f9 (diff) | |
parent | 89b97c429e2e77d695b5133572ca12ec256a4ea4 (diff) | |
download | linux-stable-48f3a83283ea7bac9d7fa0c6f84ae64388707df0.tar.gz linux-stable-48f3a83283ea7bac9d7fa0c6f84ae64388707df0.tar.bz2 linux-stable-48f3a83283ea7bac9d7fa0c6f84ae64388707df0.zip |
Merge tag 'aspeed-5.4-devicetree-2' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into arm/dt
ASPEED device tree updates for 5.4, second round
- Alternate flash support for Vesnin
- Minor cleanups and fixes
* tag 'aspeed-5.4-devicetree-2' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed:
ARM: dts: aspeed-g5: Fixe gpio-ranges upper limit
ARM; dts: aspeed: mihawk: File should not be executable
ARM: dts: aspeed: swift: Change power supplies to version 2
ARM: dts: aspeed: vesnin: Add secondary SPI flash chip
ARM: dts: aspeed: vesnin: Add wdt2 with alt-boot option
ARM: dts: aspeed-g4: Add all flash chips
Link: https://lore.kernel.org/r/CACPK8Xdp4gVuetmiu2bRTTH6oHhRrC7FELHWKVB2ZGSbPbH7HQ@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch')
-rw-r--r--[-rwxr-xr-x] | arch/arm/boot/dts/aspeed-bmc-opp-mihawk.dts | 0 | ||||
-rw-r--r-- | arch/arm/boot/dts/aspeed-bmc-opp-swift.dts | 4 | ||||
-rw-r--r-- | arch/arm/boot/dts/aspeed-bmc-opp-vesnin.dts | 10 | ||||
-rw-r--r-- | arch/arm/boot/dts/aspeed-g4.dtsi | 20 | ||||
-rw-r--r-- | arch/arm/boot/dts/aspeed-g5.dtsi | 2 |
5 files changed, 33 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-mihawk.dts b/arch/arm/boot/dts/aspeed-bmc-opp-mihawk.dts index e55cc454b17f..e55cc454b17f 100755..100644 --- a/arch/arm/boot/dts/aspeed-bmc-opp-mihawk.dts +++ b/arch/arm/boot/dts/aspeed-bmc-opp-mihawk.dts diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-swift.dts b/arch/arm/boot/dts/aspeed-bmc-opp-swift.dts index 25bc0e1bbced..f67fef1ac5e1 100644 --- a/arch/arm/boot/dts/aspeed-bmc-opp-swift.dts +++ b/arch/arm/boot/dts/aspeed-bmc-opp-swift.dts @@ -494,7 +494,7 @@ }; power-supply@68 { - compatible = "ibm,cffps1"; + compatible = "ibm,cffps2"; reg = <0x68>; }; @@ -504,7 +504,7 @@ }; power-supply@69 { - compatible = "ibm,cffps1"; + compatible = "ibm,cffps2"; reg = <0x69>; }; diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-vesnin.dts b/arch/arm/boot/dts/aspeed-bmc-opp-vesnin.dts index 0b9e29c3212e..a27c88d23056 100644 --- a/arch/arm/boot/dts/aspeed-bmc-opp-vesnin.dts +++ b/arch/arm/boot/dts/aspeed-bmc-opp-vesnin.dts @@ -81,6 +81,12 @@ label = "bmc"; #include "openbmc-flash-layout.dtsi" }; + + flash@1 { + status = "okay"; + m25p,fast-read; + label = "alt"; + }; }; &spi { @@ -222,3 +228,7 @@ &vuart { status = "okay"; }; + +&wdt2 { + aspeed,alt-boot; +}; diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi index e465cda40fe7..dffb595d30e4 100644 --- a/arch/arm/boot/dts/aspeed-g4.dtsi +++ b/arch/arm/boot/dts/aspeed-g4.dtsi @@ -67,6 +67,26 @@ compatible = "jedec,spi-nor"; status = "disabled"; }; + flash@1 { + reg = < 1 >; + compatible = "jedec,spi-nor"; + status = "disabled"; + }; + flash@2 { + reg = < 2 >; + compatible = "jedec,spi-nor"; + status = "disabled"; + }; + flash@3 { + reg = < 3 >; + compatible = "jedec,spi-nor"; + status = "disabled"; + }; + flash@4 { + reg = < 4 >; + compatible = "jedec,spi-nor"; + status = "disabled"; + }; }; spi: spi@1e630000 { diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi index f360b6c565a5..e8feb8b66a2f 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi @@ -301,7 +301,7 @@ compatible = "aspeed,ast2500-gpio"; reg = <0x1e780000 0x1000>; interrupts = <20>; - gpio-ranges = <&pinctrl 0 0 220>; + gpio-ranges = <&pinctrl 0 0 232>; clocks = <&syscon ASPEED_CLK_APB>; interrupt-controller; #interrupt-cells = <2>; |