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author | Robert Marko <robert.marko@sartura.hr> | 2023-08-11 13:01:16 +0200 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2023-09-13 09:42:43 +0200 |
commit | 1e47d1ac20e3b0025ecd0ab0f698d82c1c37eee7 (patch) | |
tree | d2149e742abb4fb93d47ddd7eadc8d7ad0ab4d1e /arch | |
parent | 4d6a25792fc1b7b434d855d317e4d77b3cab7cae (diff) | |
download | linux-stable-1e47d1ac20e3b0025ecd0ab0f698d82c1c37eee7.tar.gz linux-stable-1e47d1ac20e3b0025ecd0ab0f698d82c1c37eee7.tar.bz2 linux-stable-1e47d1ac20e3b0025ecd0ab0f698d82c1c37eee7.zip |
ARM: dts: qcom: ipq4019: correct SDHCI XO clock
[ Upstream commit b5ed7a5c1fdb3981713f7b637b72aa390c3db036 ]
Using GCC_DCD_XO_CLK as the XO clock for SDHCI controller is not correct,
it seems that I somehow made a mistake of passing it instead of the fixed
XO clock.
Fixes: 04b3b72b5b8f ("ARM: dts: qcom: ipq4019: Add SDHCI controller node")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230811110150.229966-1-robert.marko@sartura.hr
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/boot/dts/qcom-ipq4019.dtsi | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi index 02e13d8c222a..b5e0ed4923b5 100644 --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi @@ -228,9 +228,12 @@ interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "hc_irq", "pwr_irq"; bus-width = <8>; - clocks = <&gcc GCC_SDCC1_AHB_CLK>, <&gcc GCC_SDCC1_APPS_CLK>, - <&gcc GCC_DCD_XO_CLK>; - clock-names = "iface", "core", "xo"; + clocks = <&gcc GCC_SDCC1_AHB_CLK>, + <&gcc GCC_SDCC1_APPS_CLK>, + <&xo>; + clock-names = "iface", + "core", + "xo"; status = "disabled"; }; |