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author | Michal Vokáč <michal.vokac@ysoft.com> | 2021-04-13 16:45:57 +0200 |
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committer | Shawn Guo <shawnguo@kernel.org> | 2021-05-13 11:47:06 +0800 |
commit | 0e4a4a08cd78efcaddbc2e4c5ed86b5a5cb8a15e (patch) | |
tree | a3c5f60f3f3cf26354c701f0b3995c46873344be /arch | |
parent | 6efb943b8616ec53a5e444193dccf1af9ad627b5 (diff) | |
download | linux-stable-0e4a4a08cd78efcaddbc2e4c5ed86b5a5cb8a15e.tar.gz linux-stable-0e4a4a08cd78efcaddbc2e4c5ed86b5a5cb8a15e.tar.bz2 linux-stable-0e4a4a08cd78efcaddbc2e4c5ed86b5a5cb8a15e.zip |
ARM: dts: imx6dl-yapp4: Fix RGMII connection to QCA8334 switch
The FEC does not have a PHY so it should not have a phy-handle. It is
connected to the switch at RGMII level so we need a fixed-link sub-node
on both ends.
This was not a problem until the qca8k.c driver was converted to PHYLINK
by commit b3591c2a3661 ("net: dsa: qca8k: Switch to PHYLINK instead of
PHYLIB"). That commit revealed the FEC configuration was not correct.
Fixes: 87489ec3a77f ("ARM: dts: imx: Add Y Soft IOTA Draco, Hydra and Ursa boards")
Cc: stable@vger.kernel.org
Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/boot/dts/imx6dl-yapp4-common.dtsi | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/imx6dl-yapp4-common.dtsi b/arch/arm/boot/dts/imx6dl-yapp4-common.dtsi index 7d2c72562c73..9148a01ed6d9 100644 --- a/arch/arm/boot/dts/imx6dl-yapp4-common.dtsi +++ b/arch/arm/boot/dts/imx6dl-yapp4-common.dtsi @@ -105,9 +105,13 @@ phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; phy-reset-duration = <20>; phy-supply = <&sw2_reg>; - phy-handle = <ðphy0>; status = "okay"; + fixed-link { + speed = <1000>; + full-duplex; + }; + mdio { #address-cells = <1>; #size-cells = <0>; |