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authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>2023-09-24 20:31:01 +0200
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2024-01-25 15:44:46 -0800
commit256035021f2e2147fd0ab5c5df3b71a6bfedd48b (patch)
tree33615a079c3ef373ae8cd8ee1d6da8be833419a5 /arch
parentd8a88dcdee7f7d8259f5c2e1ce924205382868fd (diff)
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ARM: dts: qcom: sdx65: correct PCIe EP phy-names
[ Upstream commit 94da379dba88c4cdd562bad21c9ba5656e5ed5df ] Qualcomm PCIe endpoint bindings expect phy-names to be "pciephy": arch/arm/boot/dts/qcom/qcom-sdx65-mtp.dtb: pcie-ep@1c00000: phy-names:0: 'pciephy' was expected Fixes: 9c0bb38414a4 ("ARM: dts: qcom: sdx65: Add support for PCIe EP") Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230924183103.49487-1-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/qcom/qcom-sdx65.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi
index e559adaaeee7..648899b5220f 100644
--- a/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi
@@ -338,7 +338,7 @@
power-domains = <&gcc PCIE_GDSC>;
phys = <&pcie_phy>;
- phy-names = "pcie-phy";
+ phy-names = "pciephy";
max-link-speed = <3>;
num-lanes = <2>;