summaryrefslogtreecommitdiffstats
path: root/drivers/char/pc8736x_gpio.c
diff options
context:
space:
mode:
authorJim Cromie <jim.cromie@gmail.com>2006-07-10 04:45:35 -0700
committerLinus Torvalds <torvalds@g5.osdl.org>2006-07-10 13:24:26 -0700
commit4f197842d0f3dd994882407f8760f2eda9005191 (patch)
tree3eed7508d8ae1df7aabbaea3f80f6520c695f54d /drivers/char/pc8736x_gpio.c
parent1a87d9425e0347c0e880254816d8e9f41a0e2b0c (diff)
downloadlinux-stable-4f197842d0f3dd994882407f8760f2eda9005191.tar.gz
linux-stable-4f197842d0f3dd994882407f8760f2eda9005191.tar.bz2
linux-stable-4f197842d0f3dd994882407f8760f2eda9005191.zip
[PATCH] pc8736x_gpio: fix re-modprobe errors: define and use constants
add constant defines - preparatory patch - adds #define CONSTs for max-pin, gpio-addr-range (for reserving region) - fix wrong max-pin check in gpio_open() - add 'Winbond' to module description. NSC sold the product, Winbond has supported us / lm-sensors Signed-off-by: Jim Cromie <jim.cromie@gmail.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'drivers/char/pc8736x_gpio.c')
-rw-r--r--drivers/char/pc8736x_gpio.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/char/pc8736x_gpio.c b/drivers/char/pc8736x_gpio.c
index 4005ee0aa11e..5b09efcf60a6 100644
--- a/drivers/char/pc8736x_gpio.c
+++ b/drivers/char/pc8736x_gpio.c
@@ -25,7 +25,7 @@
#define DEVNAME "pc8736x_gpio"
MODULE_AUTHOR("Jim Cromie <jim.cromie@gmail.com>");
-MODULE_DESCRIPTION("NatSemi PC-8736x GPIO Pin Driver");
+MODULE_DESCRIPTION("NatSemi/Winbond PC-8736x GPIO Pin Driver");
MODULE_LICENSE("GPL");
static int major; /* default to dynamic major */
@@ -38,14 +38,14 @@ static u8 pc8736x_gpio_shadow[4];
#define SIO_BASE1 0x2E /* 1st command-reg to check */
#define SIO_BASE2 0x4E /* alt command-reg to check */
-#define SIO_BASE_OFFSET 0x20
#define SIO_SID 0x20 /* SuperI/O ID Register */
#define SIO_SID_VALUE 0xe9 /* Expected value in SuperI/O ID Register */
#define SIO_CF1 0x21 /* chip config, bit0 is chip enable */
-#define PC8736X_GPIO_SIZE 16
+#define PC8736X_GPIO_RANGE 16 /* ioaddr range */
+#define PC8736X_GPIO_CT 32 /* minors matching 4 8 bit ports */
#define SIO_UNIT_SEL 0x7 /* unit select reg */
#define SIO_UNIT_ACT 0x30 /* unit enable */
@@ -231,7 +231,7 @@ static int pc8736x_gpio_open(struct inode *inode, struct file *file)
dev_dbg(&pdev->dev, "open %d\n", m);
- if (m > 63)
+ if (m >= PC8736X_GPIO_CT)
return -EINVAL;
return nonseekable_open(inode, file);
}
@@ -297,7 +297,7 @@ static int __init pc8736x_gpio_init(void)
pc8736x_gpio_base = (superio_inb(SIO_BASE_HADDR) << 8
| superio_inb(SIO_BASE_LADDR));
- if (!request_region(pc8736x_gpio_base, 16, DEVNAME)) {
+ if (!request_region(pc8736x_gpio_base, PC8736X_GPIO_RANGE, DEVNAME)) {
rc = -ENODEV;
dev_err(&pdev->dev, "GPIO ioport %x busy\n",
pc8736x_gpio_base);