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| author | Jerome Brunet <jbrunet@baylibre.com> | 2018-02-19 12:21:43 +0100 |
|---|---|---|
| committer | Neil Armstrong <narmstrong@baylibre.com> | 2018-03-13 10:09:54 +0100 |
| commit | 093c3fac4619d267136dc4cb87b916c692fa07db (patch) | |
| tree | ed317e1463a0ac2ebf592a92e9ed3ec237637e55 /drivers/clk/meson/axg.h | |
| parent | a4fb7df25de26d12feec4e96687121ec28480a71 (diff) | |
| download | linux-stable-093c3fac4619d267136dc4cb87b916c692fa07db.tar.gz linux-stable-093c3fac4619d267136dc4cb87b916c692fa07db.tar.bz2 linux-stable-093c3fac4619d267136dc4cb87b916c692fa07db.zip | |
clk: meson: axg: add hifi pll clock
Add the hifi pll to the axg clock controller. This clock maybe used as an
input of the axg audio clock controller. It uses the same settings table
as the gp0 pll but has a frac parameter allowing more precision.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Diffstat (limited to 'drivers/clk/meson/axg.h')
| -rw-r--r-- | drivers/clk/meson/axg.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/meson/axg.h b/drivers/clk/meson/axg.h index 4c1502a8b8c9..4916c7045c48 100644 --- a/drivers/clk/meson/axg.h +++ b/drivers/clk/meson/axg.h @@ -122,7 +122,7 @@ #define CLKID_MPLL2_DIV 67 #define CLKID_MPLL3_DIV 68 -#define NR_CLKS 69 +#define NR_CLKS 70 /* include the CLKIDs that have been made part of the DT binding */ #include <dt-bindings/clock/axg-clkc.h> |