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author | Takeshi Kihara <takeshi.kihara.df@renesas.com> | 2019-03-25 17:35:50 +0100 |
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committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2019-04-02 09:50:48 +0200 |
commit | 20cc05ba04a93f05d6c50789fe35d762a2db4e96 (patch) | |
tree | e1645087c864ccbb4eb065f4d09dadb998900464 /drivers/clk/renesas/rcar-gen3-cpg.h | |
parent | 1addd6d568d02a9a1ce44307ec9c678e66e18c9e (diff) | |
download | linux-stable-20cc05ba04a93f05d6c50789fe35d762a2db4e96.tar.gz linux-stable-20cc05ba04a93f05d6c50789fe35d762a2db4e96.tar.bz2 linux-stable-20cc05ba04a93f05d6c50789fe35d762a2db4e96.zip |
clk: renesas: rcar-gen3: Parameterise Z and Z2 clock fixed divisor
Parameterise Z and Z2 clock fixed divisor to allow clocks with a fixed
divisor other than 2, the value used by all such clocks supported to date.
This is in preparation for supporting the Z2 clock on the R-Car E3
(r8a77990) SoC which has a fixed divisor of 4.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[simon: squashed several patches; rewrote changelog; added r8a774a1 change]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/clk/renesas/rcar-gen3-cpg.h')
-rw-r--r-- | drivers/clk/renesas/rcar-gen3-cpg.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/clk/renesas/rcar-gen3-cpg.h b/drivers/clk/renesas/rcar-gen3-cpg.h index eac1b057455a..802936625330 100644 --- a/drivers/clk/renesas/rcar-gen3-cpg.h +++ b/drivers/clk/renesas/rcar-gen3-cpg.h @@ -3,6 +3,7 @@ * R-Car Gen3 Clock Pulse Generator * * Copyright (C) 2015-2018 Glider bvba + * Copyright (C) 2018 Renesas Electronics Corp. * */ @@ -51,6 +52,9 @@ enum rcar_gen3_clk_types { DEF_BASE(_name, _id, CLK_TYPE_GEN3_RCKSEL, \ (_parent0) << 16 | (_parent1), .div = (_div0) << 16 | (_div1)) +#define DEF_GEN3_Z(_name, _id, _type, _parent, _div) \ + DEF_BASE(_name, _id, _type, _parent, .div = _div) + struct rcar_gen3_cpg_pll_config { u8 extal_div; u8 pll1_mult; |