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| author | Wolfram Sang <wsa+renesas@sang-engineering.com> | 2021-03-11 10:29:37 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2021-03-12 09:23:24 +0100 |
| commit | 0eedab655ec1817d450085dcb12219726cb415ff (patch) | |
| tree | 6b7d6acc99ccc60d3c0e6121e3ad6b4b24981668 /drivers/clk | |
| parent | 95acd758fe4bcbbf6e43a7229e2518facb87212f (diff) | |
| download | linux-stable-0eedab655ec1817d450085dcb12219726cb415ff.tar.gz linux-stable-0eedab655ec1817d450085dcb12219726cb415ff.tar.bz2 linux-stable-0eedab655ec1817d450085dcb12219726cb415ff.zip | |
clk: renesas: r8a779a0: Add CMT clocks
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210311092939.3129-2-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/clk')
| -rw-r--r-- | drivers/clk/renesas/r8a779a0-cpg-mssr.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/clk/renesas/r8a779a0-cpg-mssr.c b/drivers/clk/renesas/r8a779a0-cpg-mssr.c index 12607a793143..867c565cb58f 100644 --- a/drivers/clk/renesas/r8a779a0-cpg-mssr.c +++ b/drivers/clk/renesas/r8a779a0-cpg-mssr.c @@ -233,6 +233,10 @@ static const struct mssr_mod_clk r8a779a0_mod_clks[] __initconst = { DEF_MOD("vspd0", 830, R8A779A0_CLK_S3D1), DEF_MOD("vspd1", 831, R8A779A0_CLK_S3D1), DEF_MOD("rwdt", 907, R8A779A0_CLK_R), + DEF_MOD("cmt0", 910, R8A779A0_CLK_R), + DEF_MOD("cmt1", 911, R8A779A0_CLK_R), + DEF_MOD("cmt2", 912, R8A779A0_CLK_R), + DEF_MOD("cmt3", 913, R8A779A0_CLK_R), DEF_MOD("pfc0", 915, R8A779A0_CLK_CP), DEF_MOD("pfc1", 916, R8A779A0_CLK_CP), DEF_MOD("pfc2", 917, R8A779A0_CLK_CP), |