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authorJoel Stanley <joel@jms.id.au>2016-07-21 23:13:51 +0930
committerDaniel Lezcano <daniel.lezcano@linaro.org>2016-09-09 14:15:21 +0200
commit70164742783c371516199271d923731afc40e25e (patch)
treeb76b01857aaf96a4c3f89782c443724539a41fc2 /drivers/clocksource
parent950d8381d915ee293a5b57f91e59dd8115684af1 (diff)
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clocksource/drivers/moxart: Refactor enable/disable
This patch abstracts the enable and disable register writes into their own functions in preparation for future changes to use SoC specific values for the writes. Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Diffstat (limited to 'drivers/clocksource')
-rw-r--r--drivers/clocksource/moxart_timer.c22
1 files changed, 16 insertions, 6 deletions
diff --git a/drivers/clocksource/moxart_timer.c b/drivers/clocksource/moxart_timer.c
index 841454417acd..a3aaa5658a49 100644
--- a/drivers/clocksource/moxart_timer.c
+++ b/drivers/clocksource/moxart_timer.c
@@ -58,15 +58,25 @@
static void __iomem *base;
static unsigned int clock_count_per_tick;
-static int moxart_shutdown(struct clock_event_device *evt)
+static inline void moxart_disable(struct clock_event_device *evt)
{
writel(TIMER1_DISABLE, base + TIMER_CR);
+}
+
+static inline void moxart_enable(struct clock_event_device *evt)
+{
+ writel(TIMER1_ENABLE, base + TIMER_CR);
+}
+
+static int moxart_shutdown(struct clock_event_device *evt)
+{
+ moxart_disable(evt);
return 0;
}
static int moxart_set_oneshot(struct clock_event_device *evt)
{
- writel(TIMER1_DISABLE, base + TIMER_CR);
+ moxart_disable(evt);
writel(~0, base + TIMER1_BASE + REG_LOAD);
return 0;
}
@@ -74,21 +84,21 @@ static int moxart_set_oneshot(struct clock_event_device *evt)
static int moxart_set_periodic(struct clock_event_device *evt)
{
writel(clock_count_per_tick, base + TIMER1_BASE + REG_LOAD);
- writel(TIMER1_ENABLE, base + TIMER_CR);
+ moxart_enable(evt);
return 0;
}
static int moxart_clkevt_next_event(unsigned long cycles,
- struct clock_event_device *unused)
+ struct clock_event_device *evt)
{
u32 u;
- writel(TIMER1_DISABLE, base + TIMER_CR);
+ moxart_disable(evt);
u = readl(base + TIMER1_BASE + REG_COUNT) - cycles;
writel(u, base + TIMER1_BASE + REG_MATCH1);
- writel(TIMER1_ENABLE, base + TIMER_CR);
+ moxart_enable(evt);
return 0;
}