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| author | Zhen Lei <thunder.leizhen@huawei.com> | 2020-09-18 21:22:32 +0800 |
|---|---|---|
| committer | Daniel Lezcano <daniel.lezcano@linaro.org> | 2020-09-24 10:51:04 +0200 |
| commit | 2f71078e7753b2fbba62999aa46c2fad16df9d98 (patch) | |
| tree | 803cfae1d16c52055c6532456bc9847105a8053c /drivers/clocksource | |
| parent | 975434f8b24a55af31daa4634972890c061a0a0c (diff) | |
| download | linux-stable-2f71078e7753b2fbba62999aa46c2fad16df9d98.tar.gz linux-stable-2f71078e7753b2fbba62999aa46c2fad16df9d98.tar.bz2 linux-stable-2f71078e7753b2fbba62999aa46c2fad16df9d98.zip | |
clocksource/drivers/sp804: Remove a mismatched comment
writel(0, base + TIMER_CTRL);
... ...
writel(xxx | TIMER_CTRL_PERIODIC, base + TIMER_CTRL);
The timer is just temporarily disabled, and it will be set to periodic
mode later.
The description of the field TimerMode of the register TimerXControl
as shown below:
0 = Timer module is in free-running mode (default)
1 = Timer module is in periodic mode.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20200918132237.3552-5-thunder.leizhen@huawei.com
Diffstat (limited to 'drivers/clocksource')
| -rw-r--r-- | drivers/clocksource/timer-sp804.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/clocksource/timer-sp804.c b/drivers/clocksource/timer-sp804.c index 097f5a83163c..a443f392a8e7 100644 --- a/drivers/clocksource/timer-sp804.c +++ b/drivers/clocksource/timer-sp804.c @@ -76,7 +76,6 @@ int __init sp804_clocksource_and_sched_clock_init(void __iomem *base, if (rate < 0) return -EINVAL; - /* setup timer 0 as free-running clocksource */ writel(0, base + TIMER_CTRL); writel(0xffffffff, base + TIMER_LOAD); writel(0xffffffff, base + TIMER_VALUE); |