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author | Meng Yu <yumeng18@huawei.com> | 2020-09-19 11:13:52 +0800 |
---|---|---|
committer | Herbert Xu <herbert@gondor.apana.org.au> | 2020-09-25 17:48:53 +1000 |
commit | bfc1159e7f0607cdaaef380792c036b96310da72 (patch) | |
tree | 17fc6dbf62f8bbcf59c65d9459d4c5d45f001cb6 /drivers/crypto | |
parent | 937e871762d84cd293c48b1d9689f3c97f486098 (diff) | |
download | linux-stable-bfc1159e7f0607cdaaef380792c036b96310da72.tar.gz linux-stable-bfc1159e7f0607cdaaef380792c036b96310da72.tar.bz2 linux-stable-bfc1159e7f0607cdaaef380792c036b96310da72.zip |
crypto: hisilicon/hpre - fix a bug in dh algorithm
Using 'g' not equal to 2 in dh algorithm may cause an error like this:
arm-smmu-v3 arm-smmu-v3.1.auto: event 0x10 received:
dh: Party A: generate public key test failed. err -22
11375.065672] dh alg: dh: test failed on vector 1, err=-22
arm-smmu-v3 arm-smmu-v3.1.auto: 0x0000790000000010
arm-smmu-v3 arm-smmu-v3.1.auto: 0x0000120800000080
hpre-dh self test failed
arm-smmu-v3 arm-smmu-v3.1.auto: 0x0000000000000000
arm-smmu-v3 arm-smmu-v3.1.auto: 0x0000000000000000
arm-smmu-v3 arm-smmu-v3.1.auto: event 0x10 received:
arm-smmu-v3 arm-smmu-v3.1.auto: 0x0000790000000010
arm-smmu-v3 arm-smmu-v3.1.auto: 0x0000120800000083
arm-smmu-v3 arm-smmu-v3.1.auto: 0x00000000000000c0
arm-smmu-v3 arm-smmu-v3.1.auto: 0x0000000000000000
arm-smmu-v3 arm-smmu-v3.1.auto: event 0x10 received:
arm-smmu-v3 arm-smmu-v3.1.auto: 0x0000790000000010
arm-smmu-v3 arm-smmu-v3.1.auto: 0x0000120800000081
arm-smmu-v3 arm-smmu-v3.1.auto: 0x0000000000000040
arm-smmu-v3 arm-smmu-v3.1.auto: 0x0000000000000000
arm-smmu-v3 arm-smmu-v3.1.auto: event 0x10 received:
arm-smmu-v3 arm-smmu-v3.1.auto: 0x0000790000000010
arm-smmu-v3 arm-smmu-v3.1.auto: 0x0000120800000082
arm-smmu-v3 arm-smmu-v3.1.auto: 0x0000000000000080
arm-smmu-v3 arm-smmu-v3.1.auto: 0x0000000000000000
hisi_hpre 0000:79:00.0: dat_rd_poison_int_set [error status=0x8] found
hisi_hpre 0000:79:00.0: ooo_rdrsp_err_int_set [error status=0xfc00] found
hisi_hpre 0000:79:00.0: Controller resetting...
hisi_hpre 0000:79:00.0: Controller reset complete
{2}[Hardware Error]: Hardware error from APEI Generic Hardware Error Source: 0
{2}[Hardware Error]: event severity: recoverable
{2}[Hardware Error]: Error 0, type: recoverable
{2}[Hardware Error]: section type: unknown, c8b328a8-9917-4af6-9a13-2e08ab2e7586
{2}[Hardware Error]: section length: 0x4c
as we missed initiating 'msg->in'.
Fixes: c8b4b477079d("crypto: hisilicon - add HiSilicon HPRE accelerator")
Signed-off-by: Meng Yu <yumeng18@huawei.com>
Reviewed-by: Zaibo Xu <xuzaibo@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto')
-rw-r--r-- | drivers/crypto/hisilicon/hpre/hpre_crypto.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/crypto/hisilicon/hpre/hpre_crypto.c b/drivers/crypto/hisilicon/hpre/hpre_crypto.c index 8bdaca0a350f..a87f9904087a 100644 --- a/drivers/crypto/hisilicon/hpre/hpre_crypto.c +++ b/drivers/crypto/hisilicon/hpre/hpre_crypto.c @@ -528,6 +528,8 @@ static int hpre_dh_compute_value(struct kpp_request *req) ret = hpre_hw_data_init(hpre_req, req->src, req->src_len, 1, 1); if (unlikely(ret)) goto clear_all; + } else { + msg->in = cpu_to_le64(ctx->dh.dma_g); } ret = hpre_hw_data_init(hpre_req, req->dst, req->dst_len, 0, 1); |