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| author | Len Brown <len.brown@intel.com> | 2016-11-18 01:23:17 -0500 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2016-11-18 12:07:56 +0100 |
| commit | b65ce83f2a607ad478c5492812f5f218e8d57a6b (patch) | |
| tree | e935c3efcdda516d4a400aeedbcf5cd1f209ef2f /drivers/dma/ioat | |
| parent | a25f0944ba9b1d8a6813fd6f1a86f1bd59ac25a6 (diff) | |
| download | linux-stable-b65ce83f2a607ad478c5492812f5f218e8d57a6b.tar.gz linux-stable-b65ce83f2a607ad478c5492812f5f218e8d57a6b.tar.bz2 linux-stable-b65ce83f2a607ad478c5492812f5f218e8d57a6b.zip | |
i7300_idle: Remove this driver
In preparation for removing the idle_notifier, remove its only user, the
i7300_idle driver.
i7300_idle was deployed in 2008 to reduce idle memory power on systems
using the i7300 chipset. The driver worked by throttling the
fully-buffered DIMMs during idle periods using the IOAT DMA engine.
The driver ran only on the i7300 chip-set, and no other hardware has used
this mechanism. The driver no longer has a maintainer.
Removing this driver will increase idle power on i7300 systems when they
run the new kernel without the driver.
Signed-off-by: Len Brown <len.brown@intel.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: http://lkml.kernel.org/r/ad6a044e57cc75f44cc8621abe846e58f7882243.1479449716.git.len.brown@intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'drivers/dma/ioat')
| -rw-r--r-- | drivers/dma/ioat/registers.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/drivers/dma/ioat/registers.h b/drivers/dma/ioat/registers.h index 48fa4cf9f64a..2f3bbc88ff2a 100644 --- a/drivers/dma/ioat/registers.h +++ b/drivers/dma/ioat/registers.h @@ -106,8 +106,6 @@ #define IOAT_DMA_COMP_V1 0x0001 /* Compatibility with DMA version 1 */ #define IOAT_DMA_COMP_V2 0x0002 /* Compatibility with DMA version 2 */ -/* IOAT1 define left for i7300_idle driver to not fail compiling */ -#define IOAT1_CHANSTS_OFFSET 0x04 #define IOAT_CHANSTS_OFFSET 0x08 /* 64-bit Channel Status Register */ #define IOAT_CHANSTS_COMPLETED_DESCRIPTOR_ADDR (~0x3fULL) #define IOAT_CHANSTS_SOFT_ERR 0x10ULL |