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author | Yazen Ghannam <yazen.ghannam@amd.com> | 2023-05-15 11:35:34 +0000 |
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committer | Borislav Petkov (AMD) <bp@alien8.de> | 2023-06-05 12:27:11 +0200 |
commit | c35977b00fa76ce5f3fe9afdb9cffda970c943d5 (patch) | |
tree | d49e990c397f8a53059af5213ba32d1db05fd4ed /drivers/edac | |
parent | f5e87cd5114e9c6d15a12922f26bdd6e24e508ee (diff) | |
download | linux-stable-c35977b00fa76ce5f3fe9afdb9cffda970c943d5.tar.gz linux-stable-c35977b00fa76ce5f3fe9afdb9cffda970c943d5.tar.bz2 linux-stable-c35977b00fa76ce5f3fe9afdb9cffda970c943d5.zip |
x86/MCE/AMD, EDAC/mce_amd: Decode UMC_V2 ECC errors
The MI200 (Aldebaran) series of devices introduced a new SMCA bank type
for Unified Memory Controllers. The MCE subsystem already has support
for this new type. The MCE decoder module will decode the common MCA
error information for the new bank type, but it will not pass the
information to the AMD64 EDAC module for detailed memory error decoding.
Have the MCE decoder module recognize the new bank type as an SMCA UMC
memory error and pass the MCA information to AMD64 EDAC.
Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
Co-developed-by: Muralidhara M K <muralidhara.mk@amd.com>
Signed-off-by: Muralidhara M K <muralidhara.mk@amd.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/r/20230515113537.1052146-3-muralimk@amd.com
Diffstat (limited to 'drivers/edac')
-rw-r--r-- | drivers/edac/mce_amd.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/edac/mce_amd.c b/drivers/edac/mce_amd.c index cc5c63feb26a..9215c06783df 100644 --- a/drivers/edac/mce_amd.c +++ b/drivers/edac/mce_amd.c @@ -1186,7 +1186,8 @@ static void decode_smca_error(struct mce *m) if (xec < smca_mce_descs[bank_type].num_descs) pr_cont(", %s.\n", smca_mce_descs[bank_type].descs[xec]); - if (bank_type == SMCA_UMC && xec == 0 && decode_dram_ecc) + if ((bank_type == SMCA_UMC || bank_type == SMCA_UMC_V2) && + xec == 0 && decode_dram_ecc) decode_dram_ecc(topology_die_id(m->extcpu), m); } |