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| author | Cong Dang <cong.dang.xn@renesas.com> | 2022-10-12 16:01:51 +0200 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2022-10-18 13:02:44 -0400 |
| commit | 5192481f908e576be42bd39ec12979b79e11f7e0 (patch) | |
| tree | c5942c3933bb8e7a4adeb634371ebb35075cbd1b /drivers/fpga/dfl-afu-region.c | |
| parent | fad9489abf932ff01ca2b9a9bf41a11311bdc8d5 (diff) | |
| download | linux-stable-5192481f908e576be42bd39ec12979b79e11f7e0.tar.gz linux-stable-5192481f908e576be42bd39ec12979b79e11f7e0.tar.bz2 linux-stable-5192481f908e576be42bd39ec12979b79e11f7e0.zip | |
memory: renesas-rpc-if: Clear HS bit during hardware initialization
According to the datasheet, HS bit should be specified to 1 when using
DMA transfer. As DMA transfer is not supported, it should be cleared to
0.
Previously, the driver relied on the HS bit being cleared by prior
firmware but this is not always the case.
Fix this by ensuring the bit is cleared during hardware initialization.
Fixes: ca7d8b980b67 ("memory: add Renesas RPC-IF driver")
Signed-off-by: Cong Dang <cong.dang.xn@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/08d9fb10b3051decebf871267a6e2e7cb2d4faf9.1665583089.git.geert+renesas@glider.be
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Diffstat (limited to 'drivers/fpga/dfl-afu-region.c')
0 files changed, 0 insertions, 0 deletions