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author | Alan Cox <alan@linux.intel.com> | 2012-03-08 16:00:31 +0000 |
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committer | Dave Airlie <airlied@redhat.com> | 2012-03-10 13:05:28 +0000 |
commit | 648a8e342c5a754bdc62f003d3af90507c1abfde (patch) | |
tree | 95dd76398a23ac3d6a662c7f71445aa22a89302a /drivers/gpu/drm/gma500/psb_intel_display.c | |
parent | 933315acb6e223d4da36cb0b95d18dcfa6323658 (diff) | |
download | linux-stable-648a8e342c5a754bdc62f003d3af90507c1abfde.tar.gz linux-stable-648a8e342c5a754bdc62f003d3af90507c1abfde.tar.bz2 linux-stable-648a8e342c5a754bdc62f003d3af90507c1abfde.zip |
gma500: now move the Oaktrail save state into its own structure
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/gma500/psb_intel_display.c')
-rw-r--r-- | drivers/gpu/drm/gma500/psb_intel_display.c | 27 |
1 files changed, 16 insertions, 11 deletions
diff --git a/drivers/gpu/drm/gma500/psb_intel_display.c b/drivers/gpu/drm/gma500/psb_intel_display.c index 49e983508d5c..4ba1ae8b5e30 100644 --- a/drivers/gpu/drm/gma500/psb_intel_display.c +++ b/drivers/gpu/drm/gma500/psb_intel_display.c @@ -845,7 +845,7 @@ void psb_intel_crtc_load_lut(struct drm_crtc *crtc) gma_power_end(dev); } else { for (i = 0; i < 256; i++) { - dev_priv->save_palette_a[i] = + dev_priv->regs.save_palette_a[i] = ((psb_intel_crtc->lut_r[i] + psb_intel_crtc->lut_adj[i]) << 16) | ((psb_intel_crtc->lut_g[i] + @@ -1141,18 +1141,19 @@ static int psb_intel_crtc_clock_get(struct drm_device *dev, gma_power_end(dev); } else { dpll = (pipe == 0) ? - dev_priv->saveDPLL_A : dev_priv->saveDPLL_B; + dev_priv->regs.saveDPLL_A : dev_priv->regs.saveDPLL_B; if ((dpll & DISPLAY_RATE_SELECT_FPA1) == 0) fp = (pipe == 0) ? - dev_priv->saveFPA0 : - dev_priv->saveFPB0; + dev_priv->regs.saveFPA0 : + dev_priv->regs.saveFPB0; else fp = (pipe == 0) ? - dev_priv->saveFPA1 : - dev_priv->saveFPB1; + dev_priv->regs.saveFPA1 : + dev_priv->regs.saveFPB1; - is_lvds = (pipe == 1) && (dev_priv->saveLVDS & LVDS_PORT_EN); + is_lvds = (pipe == 1) && (dev_priv->regs.saveLVDS & + LVDS_PORT_EN); } clock.m1 = (fp & FP_M1_DIV_MASK) >> FP_M1_DIV_SHIFT; @@ -1218,13 +1219,17 @@ struct drm_display_mode *psb_intel_crtc_mode_get(struct drm_device *dev, gma_power_end(dev); } else { htot = (pipe == 0) ? - dev_priv->saveHTOTAL_A : dev_priv->saveHTOTAL_B; + dev_priv->regs.saveHTOTAL_A : + dev_priv->regs.saveHTOTAL_B; hsync = (pipe == 0) ? - dev_priv->saveHSYNC_A : dev_priv->saveHSYNC_B; + dev_priv->regs.saveHSYNC_A : + dev_priv->regs.saveHSYNC_B; vtot = (pipe == 0) ? - dev_priv->saveVTOTAL_A : dev_priv->saveVTOTAL_B; + dev_priv->regs.saveVTOTAL_A : + dev_priv->regs.saveVTOTAL_B; vsync = (pipe == 0) ? - dev_priv->saveVSYNC_A : dev_priv->saveVSYNC_B; + dev_priv->regs.saveVSYNC_A : + dev_priv->regs.saveVSYNC_B; } mode = kzalloc(sizeof(*mode), GFP_KERNEL); |