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| author | Anusha Srivatsa <anusha.srivatsa@intel.com> | 2018-10-31 13:27:26 -0700 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2018-11-01 11:21:26 -0700 |
| commit | 3b6ac43b48576d7b38539c31b4e370b2e942c3aa (patch) | |
| tree | ced5e7401bf7c2e7a34204a8dcd0daf5625f8638 /drivers/gpu/drm/i915/i915_drv.c | |
| parent | 8b1b558d690aa37e4dd36420d01d1cbd20f11eaa (diff) | |
| download | linux-stable-3b6ac43b48576d7b38539c31b4e370b2e942c3aa.tar.gz linux-stable-3b6ac43b48576d7b38539c31b4e370b2e942c3aa.tar.bz2 linux-stable-3b6ac43b48576d7b38539c31b4e370b2e942c3aa.zip | |
drm/i915/icl: Fix DC9 Suspend for ICL.
Add missing block that takes care of inline intel_suspend_complete
for DC9 on ICL.
Daniele noticed this was part of original patch but missed on
on merged commit ("drm/i915/icl: Enable DC9 as lowest possible
state during screen-off").
Fixes: 3e68928b7d4c ("drm/i915/icl: Enable DC9 as lowest possible state during screen-off")
Cc: Imre Deak <imre.deak@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Animesh Manna <animesh.manna@intel.com>
Cc: James Ausmus <james.ausmus@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
[Rodrigo added a commit message while merging]
Link: https://patchwork.freedesktop.org/patch/msgid/20181031202726.4021-1-anusha.srivatsa@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_drv.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 198d625f2871..acb516308262 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -1962,7 +1962,7 @@ static int i915_drm_suspend_late(struct drm_device *dev, bool hibernation) get_suspend_mode(dev_priv, hibernation)); ret = 0; - if (IS_GEN9_LP(dev_priv)) + if (INTEL_GEN(dev_priv) >= 11 || IS_GEN9_LP(dev_priv)) bxt_enable_dc9(dev_priv); else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) hsw_enable_pc8(dev_priv); |