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| author | Matt Roper <matthew.d.roper@intel.com> | 2023-08-10 16:46:20 -0700 |
|---|---|---|
| committer | Matt Roper <matthew.d.roper@intel.com> | 2023-08-17 15:41:30 -0700 |
| commit | 4ebf43d0488f65f50fffa35e16b60fcede3f477c (patch) | |
| tree | 1dc03e770643bdf16e370838084efb57329360e7 /drivers/gpu/drm/i915/i915_drv.h | |
| parent | 3d623691ca300676699a56d5ec154ebcbe5d63eb (diff) | |
| download | linux-stable-4ebf43d0488f65f50fffa35e16b60fcede3f477c.tar.gz linux-stable-4ebf43d0488f65f50fffa35e16b60fcede3f477c.tar.bz2 linux-stable-4ebf43d0488f65f50fffa35e16b60fcede3f477c.zip | |
drm/i915: Eliminate has_4tile feature flag
We don't really need a feature flag for has_4tile since there's a
well-defined cutover point (DG2) at which all new platforms started
using Tile4 as their Y-major tiling layout. The GT side of the code
already handles Tile4 vs legacy TileY with checks on the IP version
rather than looking at the feature flag, and we can simplify the display
code similarly (which will also make it more self-contained for re-use
in the Xe driver).
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Haridhar Kalvala <haridhar.kalvala@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230810234618.3738870-4-matthew.d.roper@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 7f8fa0eb9dc6..fb4813fc084f 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -733,7 +733,6 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, #define CMDPARSER_USES_GGTT(i915) (GRAPHICS_VER(i915) == 7) #define HAS_LLC(i915) (INTEL_INFO(i915)->has_llc) -#define HAS_4TILE(i915) (INTEL_INFO(i915)->has_4tile) #define HAS_SNOOP(i915) (INTEL_INFO(i915)->has_snoop) #define HAS_EDRAM(i915) ((i915)->edram_size_mb) #define HAS_SECURE_BATCHES(i915) (GRAPHICS_VER(i915) < 6) |