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| author | Chris Wilson <chris@chris-wilson.co.uk> | 2018-07-12 20:14:30 +0100 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2018-07-13 16:18:15 +0100 |
| commit | 0b100760e3e8cbb2b5d09c1c2bcb01d50201c142 (patch) | |
| tree | f3f932fea667181e2af286a395cc00424932ffed /drivers/gpu/drm/i915/i915_gem_object.h | |
| parent | f8c1cce36ccb21b5e5ecc87fac65de0e29693f01 (diff) | |
| download | linux-stable-0b100760e3e8cbb2b5d09c1c2bcb01d50201c142.tar.gz linux-stable-0b100760e3e8cbb2b5d09c1c2bcb01d50201c142.tar.bz2 linux-stable-0b100760e3e8cbb2b5d09c1c2bcb01d50201c142.zip | |
drm/i915/userptr: Enable read-only support on gen8+
On gen8 and onwards, we can mark GPU accesses through the ppGTT as being
read-only, that is cause any GPU write onto that page to be discarded
(not triggering a fault). This is all that we need to finally support
the read-only flag for userptr!
v2: Check default address space for read only support as a proxy for the
user context/ppgtt.
Testcase: igt/gem_userptr_blits/readonly*
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jon Bloomfield <jon.bloomfield@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Matthew Auld <matthew.william.auld@gmail.com>
Reviewed-by: Jon Bloomfield <jon.bloomfield@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180712191430.9269-1-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem_object.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_gem_object.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_object.h b/drivers/gpu/drm/i915/i915_gem_object.h index 56e9f00d2c4c..83e5e01fa9ea 100644 --- a/drivers/gpu/drm/i915/i915_gem_object.h +++ b/drivers/gpu/drm/i915/i915_gem_object.h @@ -267,7 +267,6 @@ struct drm_i915_gem_object { union { struct i915_gem_userptr { uintptr_t ptr; - unsigned read_only :1; struct i915_mm_struct *mm; struct i915_mmu_object *mmu_object; |