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| author | Lionel Landwerlin <lionel.g.landwerlin@intel.com> | 2018-03-26 10:08:26 +0100 |
|---|---|---|
| committer | Lionel Landwerlin <lionel.g.landwerlin@intel.com> | 2018-03-29 13:34:27 +0100 |
| commit | b82ed43de5c01e41a7e5d756da3287fc66e7600b (patch) | |
| tree | 055499f8e04030586d958bb335c48401ece53798 /drivers/gpu/drm/i915/i915_perf.c | |
| parent | 53744104bec47a3357622f9d6815fda1c0d0f842 (diff) | |
| download | linux-stable-b82ed43de5c01e41a7e5d756da3287fc66e7600b.tar.gz linux-stable-b82ed43de5c01e41a7e5d756da3287fc66e7600b.tar.bz2 linux-stable-b82ed43de5c01e41a7e5d756da3287fc66e7600b.zip | |
drm/i915: rename PPGTT/GGTT fields OA registers
We had a generic field name used across 2 registers but it feels like
it's clearer we make it obvious what register this field belongs to.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180326090831.22686-7-lionel.g.landwerlin@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_perf.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_perf.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c index b5c65ab2615e..d41a2529bb76 100644 --- a/drivers/gpu/drm/i915/i915_perf.c +++ b/drivers/gpu/drm/i915/i915_perf.c @@ -1043,7 +1043,7 @@ static int gen7_append_oa_reports(struct i915_perf_stream *stream, I915_WRITE(GEN7_OASTATUS2, ((head & GEN7_OASTATUS2_HEAD_MASK) | - OA_MEM_SELECT_GGTT)); + GEN7_OASTATUS2_MEM_SELECT_GGTT)); dev_priv->perf.oa.oa_buffer.head = head; spin_unlock_irqrestore(&dev_priv->perf.oa.oa_buffer.ptr_lock, flags); @@ -1333,7 +1333,8 @@ static void gen7_init_oa_buffer(struct drm_i915_private *dev_priv) /* Pre-DevBDW: OABUFFER must be set with counters off, * before OASTATUS1, but after OASTATUS2 */ - I915_WRITE(GEN7_OASTATUS2, gtt_offset | OA_MEM_SELECT_GGTT); /* head */ + I915_WRITE(GEN7_OASTATUS2, + gtt_offset | GEN7_OASTATUS2_MEM_SELECT_GGTT); /* head */ dev_priv->perf.oa.oa_buffer.head = gtt_offset; I915_WRITE(GEN7_OABUFFER, gtt_offset); @@ -1393,7 +1394,7 @@ static void gen8_init_oa_buffer(struct drm_i915_private *dev_priv) * bit." */ I915_WRITE(GEN8_OABUFFER, gtt_offset | - OABUFFER_SIZE_16M | OA_MEM_SELECT_GGTT); + OABUFFER_SIZE_16M | GEN8_OABUFFER_MEM_SELECT_GGTT); I915_WRITE(GEN8_OATAILPTR, gtt_offset & GEN8_OATAILPTR_MASK); /* Mark that we need updated tail pointers to read from... */ |