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author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2018-02-21 20:48:07 +0200 |
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committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2018-02-22 17:41:37 +0200 |
commit | f7a02ad7d16b24908b9fddbd6176b1c1a2b35058 (patch) | |
tree | 645fb1ec064fc9135b46dc23ed9153a58b3dc5a0 /drivers/gpu/drm/i915/intel_fbdev.c | |
parent | 85798ac9b35f8cc7608a4a798d0b0626f0d54d61 (diff) | |
download | linux-stable-f7a02ad7d16b24908b9fddbd6176b1c1a2b35058.tar.gz linux-stable-f7a02ad7d16b24908b9fddbd6176b1c1a2b35058.tar.bz2 linux-stable-f7a02ad7d16b24908b9fddbd6176b1c1a2b35058.zip |
drm/i915: Only pin the fence for primary planes (and gen2/3)
Currently we pin a fence on every plane doing tiled scanout. The
number of planes we have available is fast apporaching the number
of fences so we really should stop wasting them. Only FBC needs
the fence on gen4+, so let's use fences only for the primary planes
on those platforms.
v2: drop the tiling check from plane_uses_fence() as the obj is
NULL during initial_plane_config() and we don't rally need the
check since i915_vma_pin_fence() does the check anyway
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180221184807.577-1-ville.syrjala@linux.intel.com
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_fbdev.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_fbdev.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_fbdev.c b/drivers/gpu/drm/i915/intel_fbdev.c index 055f409f8b75..6f12adc06365 100644 --- a/drivers/gpu/drm/i915/intel_fbdev.c +++ b/drivers/gpu/drm/i915/intel_fbdev.c @@ -215,7 +215,7 @@ static int intelfb_create(struct drm_fb_helper *helper, */ vma = intel_pin_and_fence_fb_obj(&ifbdev->fb->base, DRM_MODE_ROTATE_0, - &flags); + false, &flags); if (IS_ERR(vma)) { ret = PTR_ERR(vma); goto out_unlock; |