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| author | Mahesh Kumar <mahesh1.kumar@intel.com> | 2018-05-17 18:56:26 +0530 |
|---|---|---|
| committer | Paulo Zanoni <paulo.r.zanoni@intel.com> | 2018-06-04 16:53:55 -0700 |
| commit | 6ceb7277173597eeed8d635e08db51e35235ab21 (patch) | |
| tree | 1143610263646ee0d07caef0da1d950ce8e50e5f /drivers/gpu/drm/i915/intel_pm.c | |
| parent | 61d5676b5561d61e3fdd9e88fc2b549b9b4df08f (diff) | |
| download | linux-stable-6ceb7277173597eeed8d635e08db51e35235ab21.tar.gz linux-stable-6ceb7277173597eeed8d635e08db51e35235ab21.tar.bz2 linux-stable-6ceb7277173597eeed8d635e08db51e35235ab21.zip | |
drm/i915/icl: Don't update enabled dbuf slices struct until updated in hw
Do not update number of enabled dbuf slices in dev_priv struct until we
actually enable/disable dbuf slice in hw. This is leading to never
updating dbuf slices and resulting in DBuf slice mismatch warning.
Fixes: aa9664ffe863 ("drm/i915/icl: Enable 2nd DBuf slice only when needed")
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180517132626.5885-1-mahesh1.kumar@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index b85229e153c4..53aaaa3e6886 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -5150,7 +5150,6 @@ skl_copy_ddb_for_pipe(struct skl_ddb_values *dst, sizeof(dst->ddb.uv_plane[pipe])); memcpy(dst->ddb.plane[pipe], src->ddb.plane[pipe], sizeof(dst->ddb.plane[pipe])); - dst->ddb.enabled_slices = src->ddb.enabled_slices; } static void |