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| author | Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> | 2018-10-26 12:38:05 -0700 |
|---|---|---|
| committer | Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> | 2018-10-29 12:43:37 -0700 |
| commit | 77cac774b2fa33dff662d29f05c8e2835b815f67 (patch) | |
| tree | 2dfd8454212c0f2624c0030fb7cd9be648ffd74b /drivers/gpu/drm/i915/intel_sprite.c | |
| parent | 2a11b1b4b689b92d8f0d9d5bd7791c5e96c03d56 (diff) | |
| download | linux-stable-77cac774b2fa33dff662d29f05c8e2835b815f67.tar.gz linux-stable-77cac774b2fa33dff662d29f05c8e2835b815f67.tar.bz2 linux-stable-77cac774b2fa33dff662d29f05c8e2835b815f67.zip | |
drm/i915: Do not program aux plane offsets on gen11+
The PLANE_AUX_OFFSET mmio does not exist on ICL, do not program it. We'll
still calculate the aux offset as it is required for adjusing x-y offsets.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181026193805.11077-2-dhinakaran.pandiyan@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_sprite.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_sprite.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index be7b305990f9..e7c95ec879cc 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c @@ -414,9 +414,11 @@ skl_program_plane(struct intel_plane *plane, I915_WRITE_FW(PLANE_SIZE(pipe, plane_id), (src_h << 16) | src_w); I915_WRITE_FW(PLANE_AUX_DIST(pipe, plane_id), (plane_state->color_plane[1].offset - surf_addr) | aux_stride); - I915_WRITE_FW(PLANE_AUX_OFFSET(pipe, plane_id), - (plane_state->color_plane[1].y << 16) | - plane_state->color_plane[1].x); + + if (INTEL_GEN(dev_priv) < 11) + I915_WRITE_FW(PLANE_AUX_OFFSET(pipe, plane_id), + (plane_state->color_plane[1].y << 16) | + plane_state->color_plane[1].x); if (icl_is_hdr_plane(plane)) { u32 cus_ctl = 0; |