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author | Oscar Mateo <oscar.mateo@intel.com> | 2018-05-08 14:29:31 -0700 |
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committer | Mika Kuoppala <mika.kuoppala@linux.intel.com> | 2018-05-11 15:57:00 +0300 |
commit | 0a437d4981650615ba3b4c7a9ce0c76894637217 (patch) | |
tree | fab3a66f5e6b879f22f8d4cd07775e31fe8b813a /drivers/gpu/drm/i915/intel_workarounds.c | |
parent | 908ae05173637e9b39545636a12c244314d6fce1 (diff) | |
download | linux-stable-0a437d4981650615ba3b4c7a9ce0c76894637217.tar.gz linux-stable-0a437d4981650615ba3b4c7a9ce0c76894637217.tar.bz2 linux-stable-0a437d4981650615ba3b4c7a9ce0c76894637217.zip |
drm/i915/icl: Wa_1405779004
Disable MSC clock gating to prevent data corruption.
BSpec: 19257
v2: Rebased on top of the WA refactoring
v3: Added References (Mika)
v4:
- Rebased
- C, not lisp (Chris)
- A0 only (Mika)
References: HSDES#1405779004
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1525814984-20039-10-git-send-email-oscar.mateo@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_workarounds.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_workarounds.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c index 354740360085..469a83d521ae 100644 --- a/drivers/gpu/drm/i915/intel_workarounds.c +++ b/drivers/gpu/drm/i915/intel_workarounds.c @@ -739,6 +739,12 @@ static void icl_gt_workarounds_apply(struct drm_i915_private *dev_priv) */ I915_WRITE(GAMW_ECO_DEV_RW_IA_REG, I915_READ(GAMW_ECO_DEV_RW_IA_REG) | GAMW_ECO_DEV_CTX_RELOAD_DISABLE); + + /* Wa_1405779004:icl (pre-prod) */ + if (IS_ICL_REVID(dev_priv, ICL_REVID_A0, ICL_REVID_A0)) + I915_WRITE(SLICE_UNIT_LEVEL_CLKGATE, + I915_READ(SLICE_UNIT_LEVEL_CLKGATE) | + MSCUNIT_CLKGATE_DIS); } void intel_gt_workarounds_apply(struct drm_i915_private *dev_priv) |