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| author | Jesse Barnes <jbarnes@virtuousgeek.org> | 2013-03-08 10:45:54 -0800 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-03-23 12:18:01 +0100 |
| commit | 4e8c84a5b14bbb5b88c63941f1d939560f4abd0b (patch) | |
| tree | a655b5049f7d241b5f94ab3ce6c65086db0e4587 /drivers/gpu/drm/i915 | |
| parent | d3bc03030a3994181d420e9f3b858fe6edd71839 (diff) | |
| download | linux-stable-4e8c84a5b14bbb5b88c63941f1d939560f4abd0b.tar.gz linux-stable-4e8c84a5b14bbb5b88c63941f1d939560f4abd0b.tar.bz2 linux-stable-4e8c84a5b14bbb5b88c63941f1d939560f4abd0b.zip | |
drm/i915: set conservative clock gating values on VLV v2
We'll re-enable select bits as needed after testing and power measurement.
v2: split out wake handling bits (Jani)
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 0bb94d963b0a..8a3d89ecae69 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -3987,7 +3987,16 @@ static void valleyview_init_clock_gating(struct drm_device *dev) * Disable clock gating on th GCFG unit to prevent a delay * in the reporting of vblank events. */ - I915_WRITE(VLV_GUNIT_CLOCK_GATE, GCFG_DIS); + I915_WRITE(VLV_GUNIT_CLOCK_GATE, 0xffffffff); + + /* Conservative clock gating settings for now */ + I915_WRITE(0x9400, 0xffffffff); + I915_WRITE(0x9404, 0xffffffff); + I915_WRITE(0x9408, 0xffffffff); + I915_WRITE(0x940c, 0xffffffff); + I915_WRITE(0x9410, 0xffffffff); + I915_WRITE(0x9414, 0xffffffff); + I915_WRITE(0x9418, 0xffffffff); } static void g4x_init_clock_gating(struct drm_device *dev) |