summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv04.c
diff options
context:
space:
mode:
authorBen Skeggs <bskeggs@redhat.com>2015-01-14 15:32:15 +1000
committerBen Skeggs <bskeggs@redhat.com>2015-01-22 12:18:05 +1000
commitf84aff4ed4942add5c3bafd8464746209bc1f51c (patch)
tree852b5b856156d47bfff725693ab88d1de16cdc9f /drivers/gpu/drm/nouveau/nvkm/engine/sw/nv04.c
parent25a6402557d3903e5082fc1afb2f97706abd9a6c (diff)
downloadlinux-stable-f84aff4ed4942add5c3bafd8464746209bc1f51c.tar.gz
linux-stable-f84aff4ed4942add5c3bafd8464746209bc1f51c.tar.bz2
linux-stable-f84aff4ed4942add5c3bafd8464746209bc1f51c.zip
drm/nouveau/sw: namespace + nvidia gpu names (no binary change)
The namespace of NVKM is being changed to nvkm_ instead of nouveau_, which will be used for the DRM part of the driver. This is being done in order to make it very clear as to what part of the driver a given symbol belongs to, and as a minor step towards splitting the DRM driver out to be able to stand on its own (for virt). Because there's already a large amount of churn here anyway, this is as good a time as any to also switch to NVIDIA's device and chipset naming to ease collaboration with them. A comparison of objdump disassemblies proves no code changes. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nvkm/engine/sw/nv04.c')
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/sw/nv04.c65
1 files changed, 29 insertions, 36 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv04.c b/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv04.c
index 3d0e4bc76389..897024421d36 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv04.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv04.c
@@ -21,19 +21,15 @@
*
* Authors: Ben Skeggs
*/
-
-#include <core/os.h>
-#include <core/engctx.h>
-
#include <engine/sw.h>
#include <engine/fifo.h>
struct nv04_sw_priv {
- struct nouveau_sw base;
+ struct nvkm_sw base;
};
struct nv04_sw_chan {
- struct nouveau_sw_chan base;
+ struct nvkm_sw_chan base;
};
/*******************************************************************************
@@ -41,18 +37,16 @@ struct nv04_sw_chan {
******************************************************************************/
static int
-nv04_sw_set_ref(struct nouveau_object *object, u32 mthd,
- void *data, u32 size)
+nv04_sw_set_ref(struct nvkm_object *object, u32 mthd, void *data, u32 size)
{
- struct nouveau_object *channel = (void *)nv_engctx(object->parent);
- struct nouveau_fifo_chan *fifo = (void *)channel->parent;
+ struct nvkm_object *channel = (void *)nv_engctx(object->parent);
+ struct nvkm_fifo_chan *fifo = (void *)channel->parent;
atomic_set(&fifo->refcnt, *(u32*)data);
return 0;
}
static int
-nv04_sw_flip(struct nouveau_object *object, u32 mthd,
- void *args, u32 size)
+nv04_sw_flip(struct nvkm_object *object, u32 mthd, void *args, u32 size)
{
struct nv04_sw_chan *chan = (void *)nv_engctx(object->parent);
if (chan->base.flip)
@@ -60,16 +54,16 @@ nv04_sw_flip(struct nouveau_object *object, u32 mthd,
return -EINVAL;
}
-static struct nouveau_omthds
+static struct nvkm_omthds
nv04_sw_omthds[] = {
{ 0x0150, 0x0150, nv04_sw_set_ref },
{ 0x0500, 0x0500, nv04_sw_flip },
{}
};
-static struct nouveau_oclass
+static struct nvkm_oclass
nv04_sw_sclass[] = {
- { 0x006e, &nouveau_object_ofuncs, nv04_sw_omthds },
+ { 0x006e, &nvkm_object_ofuncs, nv04_sw_omthds },
{}
};
@@ -78,15 +72,14 @@ nv04_sw_sclass[] = {
******************************************************************************/
static int
-nv04_sw_context_ctor(struct nouveau_object *parent,
- struct nouveau_object *engine,
- struct nouveau_oclass *oclass, void *data, u32 size,
- struct nouveau_object **pobject)
+nv04_sw_context_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
+ struct nvkm_oclass *oclass, void *data, u32 size,
+ struct nvkm_object **pobject)
{
struct nv04_sw_chan *chan;
int ret;
- ret = nouveau_sw_context_create(parent, engine, oclass, &chan);
+ ret = nvkm_sw_context_create(parent, engine, oclass, &chan);
*pobject = nv_object(chan);
if (ret)
return ret;
@@ -94,14 +87,14 @@ nv04_sw_context_ctor(struct nouveau_object *parent,
return 0;
}
-static struct nouveau_oclass
+static struct nvkm_oclass
nv04_sw_cclass = {
.handle = NV_ENGCTX(SW, 0x04),
- .ofuncs = &(struct nouveau_ofuncs) {
+ .ofuncs = &(struct nvkm_ofuncs) {
.ctor = nv04_sw_context_ctor,
- .dtor = _nouveau_sw_context_dtor,
- .init = _nouveau_sw_context_init,
- .fini = _nouveau_sw_context_fini,
+ .dtor = _nvkm_sw_context_dtor,
+ .init = _nvkm_sw_context_init,
+ .fini = _nvkm_sw_context_fini,
},
};
@@ -110,20 +103,20 @@ nv04_sw_cclass = {
******************************************************************************/
void
-nv04_sw_intr(struct nouveau_subdev *subdev)
+nv04_sw_intr(struct nvkm_subdev *subdev)
{
nv_mask(subdev, 0x000100, 0x80000000, 0x00000000);
}
static int
-nv04_sw_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
- struct nouveau_oclass *oclass, void *data, u32 size,
- struct nouveau_object **pobject)
+nv04_sw_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
+ struct nvkm_oclass *oclass, void *data, u32 size,
+ struct nvkm_object **pobject)
{
struct nv04_sw_priv *priv;
int ret;
- ret = nouveau_sw_create(parent, engine, oclass, &priv);
+ ret = nvkm_sw_create(parent, engine, oclass, &priv);
*pobject = nv_object(priv);
if (ret)
return ret;
@@ -134,13 +127,13 @@ nv04_sw_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
return 0;
}
-struct nouveau_oclass *
-nv04_sw_oclass = &(struct nouveau_oclass) {
+struct nvkm_oclass *
+nv04_sw_oclass = &(struct nvkm_oclass) {
.handle = NV_ENGINE(SW, 0x04),
- .ofuncs = &(struct nouveau_ofuncs) {
+ .ofuncs = &(struct nvkm_ofuncs) {
.ctor = nv04_sw_ctor,
- .dtor = _nouveau_sw_dtor,
- .init = _nouveau_sw_init,
- .fini = _nouveau_sw_fini,
+ .dtor = _nvkm_sw_dtor,
+ .init = _nvkm_sw_init,
+ .fini = _nvkm_sw_fini,
},
};