summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/omapdrm
diff options
context:
space:
mode:
authorTomi Valkeinen <tomi.valkeinen@ti.com>2016-05-17 16:08:34 +0300
committerTomi Valkeinen <tomi.valkeinen@ti.com>2016-05-19 20:19:06 +0300
commit01575776e54734eecab390df5aa1e047896ddacb (patch)
tree55830e58f1350925577df4054afa907f1fc79436 /drivers/gpu/drm/omapdrm
parent5670bd7219d774b2dc356edac36f9953f77e19a4 (diff)
downloadlinux-stable-01575776e54734eecab390df5aa1e047896ddacb.tar.gz
linux-stable-01575776e54734eecab390df5aa1e047896ddacb.tar.bz2
linux-stable-01575776e54734eecab390df5aa1e047896ddacb.zip
drm/omap: cleanup dispc_mgr_lclk_rate()
With the new PLL helpers, we can clean up the dispc_mgr_lclk_rate(). This will also make dispc_mgr_lclk_rate() support clock sources it didn't support earlier. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers/gpu/drm/omapdrm')
-rw-r--r--drivers/gpu/drm/omapdrm/dss/dispc.c46
1 files changed, 17 insertions, 29 deletions
diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c
index 333a347f877b..01994d012ce4 100644
--- a/drivers/gpu/drm/omapdrm/dss/dispc.c
+++ b/drivers/gpu/drm/omapdrm/dss/dispc.c
@@ -3330,43 +3330,31 @@ static unsigned long dispc_fclk_rate(void)
static unsigned long dispc_mgr_lclk_rate(enum omap_channel channel)
{
- struct dss_pll *pll;
int lcd;
unsigned long r;
- u32 l;
-
- if (dss_mgr_is_lcd(channel)) {
- l = dispc_read_reg(DISPC_DIVISORo(channel));
+ enum dss_clk_source src;
- lcd = FLD_GET(l, 23, 16);
+ /* for TV, LCLK rate is the FCLK rate */
+ if (!dss_mgr_is_lcd(channel))
+ return dispc_fclk_rate();
- switch (dss_get_lcd_clk_source(channel)) {
- case DSS_CLK_SRC_FCK:
- r = dss_get_dispc_clk_rate();
- break;
- case DSS_CLK_SRC_PLL1_1:
- pll = dss_pll_find("dsi0");
- if (!pll)
- pll = dss_pll_find("video0");
+ src = dss_get_lcd_clk_source(channel);
- r = pll->cinfo.clkout[0];
- break;
- case DSS_CLK_SRC_PLL2_1:
- pll = dss_pll_find("dsi1");
- if (!pll)
- pll = dss_pll_find("video1");
+ if (src == DSS_CLK_SRC_FCK) {
+ r = dss_get_dispc_clk_rate();
+ } else {
+ struct dss_pll *pll;
+ unsigned clkout_idx;
- r = pll->cinfo.clkout[0];
- break;
- default:
- BUG();
- return 0;
- }
+ pll = dss_pll_find_by_src(src);
+ clkout_idx = dss_pll_get_clkout_idx_for_src(src);
- return r / lcd;
- } else {
- return dispc_fclk_rate();
+ r = pll->cinfo.clkout[clkout_idx];
}
+
+ lcd = REG_GET(DISPC_DIVISORo(channel), 23, 16);
+
+ return r / lcd;
}
static unsigned long dispc_mgr_pclk_rate(enum omap_channel channel)